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PDF APW8822A Data sheet ( Hoja de datos )

Número de pieza APW8822A
Descripción (APW8822/A/B/C) System Power PWM Controller
Fabricantes ANPEC 
Logotipo ANPEC Logotipo



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APW8822/A/B/C
System Power PWM Controller for Notebook Computers with Charge Pump
Features
Simplified Application Circuit
Wide Input voltage Range from 6V to 25V
Provide 5 Independent Outputs with ±1.0% Accu-
racy Over-Temperature
- PWM1 Controller with Adjustable (2V to 5.5V) Out-
put
- PWM2 Controller with Adjustable (2V to 5.5V) Out-
put
- 100mA Low Dropout Regulator (LDO5) with Fixed
5V Output
- 100mA Low Dropout Regulator (LDO3) with Fixed
3.3V Output
- 270kHz Clock Signal for 15V Charge Pump (Used General Description
VOUT1 as Its Power Supply)
The APW8822/A/B/C integrates dual step-down, constant-
Excellent Line/Load Regulations about ±1.5% Over- on-time, synchronous PWM controllers (that drives dual
Temperature Range
N-channel MOSFETs for each channel) and two low drop-
Built in POR Control Scheme Implemented
out regulators as well as various protections into a chip.
Constant On-Time Control Scheme with Frequency The PWM controllers step down high voltage of a battery
Compensation for PWM Mode
to generate low-voltage for NB applications. The output
Selectable Switching Frequency in PWM Mode
of PWM1 and PWM2 can be adjusted from 2V to 5.5V by
Built-in Digital Soft-Start for PWM Outputs and Soft- setting a resistive voltage-divider from VOUTx to GND.
Stop for PWM Outputs and LDO Outputs
The linear regulators provide 5V and 3.3V output for
Integrated Bootstrap Forward P-CH MOSFET
standby power supply. The linear regulators provide up
High Efficiency over Light to Full Load Range to 100mA output current. When the PWMx output voltage
(PWMs)
is higher than LDOx bypass threshold, the related LDOx
Built-in Power Good Indicators (PWMs)
regulator is shut off and its output is connected to VOUTx
Independent Enable Inputs (PWMs, LDO)
by internal switchover MOSFET. It can save power
70% Under-Voltage and 125% Over-Voltage Protec- dissipation. The charge pump circuit with 270kHz clock
tions (PWM)
Adjustable Current-Limit Protection (PWMs)
driver uses VOUT1 as its power supply to generate ap-
proximately 15V DC voltage.
- Using Sense Low-Side MOSFET’s R
DS(ON)
Over-Temperature Protection
The APW8822/A/B/C provides excellent transient
response and accurate DC output voltage in either PFM
3mmx3mm Thin QFN-20 (TQFN3x3-20) package or PWM Mode. In Pulse-Frequency Mode (PFM), the
Lead Free and Green Device Available (RoHS APW8822/A/B/C provides very high efficiency over light
Compliant)
to heavy loads with loading-modulated switching
frequencies. The Forced-PWM Mode works nearly at
constant frequency for low-noise requirements. The
unique ultrasonic mode maintains the switching
frequency above 25kHz, which eliminates noise in
audio application.
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Nov., 2012
1
www.anpec.com.tw
Free Datasheet http://www.datasheet4u.com/

1 page




APW8822A pdf
APW8822/A/B/C
Electrical Characteristics
Refer to the typical application circuits. These specifications apply over V =12V and T = -40 ~ 85 °C, unless otherwise
IN A
specified. Typical values are at TA=25°C.
Symbol
Parameter
Test Conditions
UNDER-VOLTAGE LOCK OUT PROTECTION (UVLO)
PWM CONTROLLERS
Rising threshold1, LDO3 enable
Rising threshold1_A/C, LDO3 &
LDO5 enable (For APW8822A/C)
Rising threshold2, LDO5 enable
Falling threshold2, PWMx shutdown
with soft stop.
When PWMx soft stop is complete,
LDO5 will begin to shutdown
Falling threshold1, LDOx shutdown
with soft stop
VFB
IFB
TSS
FSW1
FSW2
Output Voltage Adjust Range
FBx Reference Voltage
FBx input current
Soft-Start Ramp Time
Soft-Stop Time
PWM1 Switching Frequency
PWM2 Switching Frequency
UGATEx Minimum Off-Time
VOUT1, VOUT2
TA = -40 oC to 85 oC
VFBX=2.0V, TA=25 oC
ENx High to VOUT 95% Regulation,
LDO5=5V
ENx low to VFBX<0.1V
VIN=20V, PWM1=5V
VIN=20V, PWM2=3.33V
LOW DROUPUT LINEAR REGULATORS (LDO5/LDO3)
LDO5 Output Voltage
LDO3 Output Voltage
VTHBYP5
LDO5 Bypass Threshold for
VOUT1-to-LDO5 Switch On
VOUT1=GND, 6V<VIN<25V,
0<ILDO5<100mA
VOUT2=GND, 6V<VIN<25V,
0<ILDO3<100mA
VOUT1 Regulation Voltage Rising
Hysteresis
VOUT1-to-LDO5 Switch On Resistance VOUT1=5V, 50mA
LDOx Current Limit
VOUTx=GND, LDOx = GND
LDOx Discharge On Resistance
CHARGE PUMP CLOCK
VCLKH
High level voltage
VCLKL
Low level voltage
FCLK Clock frequency
PWM1/2 PROTECTIONS
ILDOX=5mA
IVCLK=-10mA, LDO5=5V, TA=25 oC
IVCLK=10mA, LDO5=5V, TA=25 oC
TA=25 oC
Over Voltage Protection Threshold
Over Voltage Fault Propagation Delay
Current Limit Current Source
VFBX Rising
Delta voltage=10mV
VILIMx=1V, TA = 25 oC
On the basis of 25 oC
Min.
-
-
-
-
-
2
1.98
-20
-
-
240
280
200
4.8
3.2
4.55
0.15
-
150
-
-
-
120
-
9
-
APW8822
Typ.
3.8
3.8
5.1
5.0
3.7
-
2.0
-
1.4
1.7
300
355
350
5.0
3.33
4.7
0.25
1.5
250
50
4.92
0.06
270
125
3
10
4500
Max.
-
-
-
-
-
5.5
2.02
20
-
-
360
430
500
5.2
3.46
4.85
0.3
3
350
100
-
-
-
130
-
11
-
Unit
V
V
V
V
V
V
V
nA
ms
ms
kHz
ns
V
V
V
mA
V
kHz
%
µs
µA
ppm/oC
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Nov., 2012
5
www.anpec.com.tw
Free Datasheet http://www.datasheet4u.com/

5 Page





APW8822A arduino
APW8822/A/B/C
Pin Description (Cont.)
PIN
NO.
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 -
- 20
Thermal Pad Thermal Pad
NAME
LGATE2
VIN
LDO5
BYP
LGATE1
UGATE1
BOOT1
PHASE1
VCLK
EN1
ENLDO
GND
FUNCTION
Output of The Low-Side MOSFET Driver for PWM2. Connect this pin to Gate
of the low-side MOSFET. Swings from PGND to LDO5.
Battery voltage input pin. VIN powers linear regulators and is also used for
the constant on-time PWM on-time one-shot circuits. Connect VIN to the
battery input and bypass with a 1µF capacitor for noise interference.
5V Linear Regulator Output. LDO5 can provide a total of 100mA, 5V external
loads. When LDO5 is at 5V and PWM1 output voltage is over 4.7V bypass
threshold, the internal LDO will shut down, and LDO5 output pin connects to
VOUT1 through a 1.5switch. Bypass to GND with a minimum of 1.0uF
ceramic capacitor for stability.
BYP is the input pin of switchover voltage for the LDO5. This pin makes a
direct measurement of the PWM1 output voltage.
Output of The Low-Side MOSFET Driver for PWM1. Connect this pin to Gate
of the low-side MOSFET. Swings from PGND to LDO5.
Output of The High-Side MOSFET Driver for PWM1. Connect this pin to Gate
of the high-side MOSFET.
Supply Input for The UGATE1 Gate Driver and an internal level-shift circuit.
Connect to an external capacitor to create a boosted voltage suitable to drive
a logic-level N-channel MOSFET.
Junction Point of The High-Side MOSFET Source, Output Filter Inductor and
The Low-Side MOSFET Drain for PWM1. Connect this pin to the Source of
the high-side MOSFET. PHASE1 serves as the lower supply rail for the
UGATE1 high-side gate driver. PHASE1 is the current-sense input for the
PWM1.
250kHz Clock Output for 15V Charge Pump.
PWM1 Enable. PWM1 is enabled when EN1=1. When EN1=0, PWM1 is in
shutdown.
Master Enable Input. The LDOx is enabled when ENLDO=1. When
ENLDO=0, the LDOx is shutdown. See the table2 “Power-Up Control
Logics”.
Signal Ground for The IC.
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Nov., 2012
11
www.anpec.com.tw
Free Datasheet http://www.datasheet4u.com/

11 Page







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