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PDF LNBP14 Data sheet ( Hoja de datos )

Número de pieza LNBP14
Descripción LNBP supply and control voltage regulator
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! LNBP14 Hoja de datos, Descripción, Manual

LNBP20 / LNBP1X series
LNBP supply and control voltage regulator (parallel interface)
Feature summary
Complete interface for two LNBs remote supply
and control
LNB selection and stand-by function
Built-in tone oscillator factory trimmed at
22KHz
Fast oscillator start-up facilitates DiSEqCTM
encoding
Two supply inputs for lowest dissipation
Bypass function for slave operation
LNB short circuit protection and diagnostic
Auxiliary modulation input extends flexibility
Cable length compensation
Internal over temperature protection
Backward current protection
Description
Intended for analog and digital satellite receivers,
the LNBP is a monolithic linear voltage regulator,
assembled in PowerSO-20 and PowerSO-10,
specifically designed to provide the powering
voltages and the interfacing signals to the LNB
downconverter situated in the antenna
PowerSO-20
10
1
PowerSO-10
via the coaxial cable. Since most satellite
receivers have two antenna ports, the output
voltage of the regulator is available at one of two
logic-selectable output pins (LNBA, LNBB). When
the IC is powered and put in Stand-by (EN pin
LOW), both regulator outputs are disabled to
allow the antenna downconverters to be
supplied/controlled by others satellite receivers
sharing the same coaxial lines. In this occurrence
the device will limit at 3 mA (max) the backward
current that could flow from LNBA and LNBB
output pins to GND. (See continuous description).
Order codes
Part number
May 2007
LNBP10
LNBP11
LNBP12
LNBP13
LNBP14
LNBP15
LNBP16
LNBP20
PowerSO-20
LNBP20PD-TR
Rev. 10
Package
PowerSO-10
LNBP10SP-TR
LNBP11SP-TR
LNBP12SP-TR
LNBP13SP-TR
LNBP14SP-TR
LNBP15SP-TR
LNBP16SP-TR
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LNBP14 pdf
LNBP20 / LNBP1X series
Pin configuration
Table 1. Pin Description
SYMBOL NAME
FUNCTION
PIN NUMBER vs SALES TYPE (LNBP)
20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP
ENT
22KHz tone Logic control input: see
enable truth table
13
7
7
7
7
7
7
7
Timing capacitor used by
CEXT
External
capacitor
the dynamic overload
protection. Typical
application is 4.7μF for a
14
8
8
8
8
8
8
8
1200ms cycle
External modulation
EXTM
External
modulator
input. Needs DC
decoupling to the AC
source. if not used, can
15 NA NA NA
9
NA
9
be left open.
9
LLC
Line length
compens.
(1V typ)
Logic control input: see
truth table
16 NA NA
9
NA
9
NA 10
Logic output (open
collector). Normally in
OLF
Over load HIGH IMPEDANCE,
flag goes LOW when current
17
NA
9
NA NA 10
10 NA
or thermal overload
occurs
In stand-by mode, the
voltage on MI is routed to
MI Master input LNBA pin. Can be left
18 NA 10 10 10 NA NA NA
open if bypass function is
not needed
LNBB
See truth tables for
Output port voltage and port
selection
19 10 NA NA NA NA NA NA
Note:
The limited pin availability of the PowerSO-10 package leads to drop some functions.
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5 Page





LNBP14 arduino
LNBP20 / LNBP1X series
Figure 9. S.V.R. vs Frequency
Typical characteristics
Figure 10. External modulation vs
temperature
Figure 11. Bypass switch drop vs output
current
Figure 12. LNBA External modulation gain vs
frequency
Figure 13. Bypass switch drop vs output
current
Figure 14. Overload flag pin logic low vs flag
current
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