|
|
PDF ISL43L840 Data sheet ( Hoja de datos )
| Número de pieza | ISL43L840 | |
| Descripción | Dual 4 to 1 Analog Multiplexer | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ISL43L840 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
|
No Preview Available !
®
Data Sheet
Ultra Low ON-Resistance, Low-Voltage,
Single Supply, Dual 4 to 1 Analog
Multiplexer
The Intersil ISL43L840 device is a precision, bidirectional,
analog switches configured as a dual 4-channel
multiplexer/demultiplexer, designed to operate from a single
+1.6V to +3.6V supply.
ON resistance is 0.5Ω with a +3V supply and 0.62Ω with a
single +1.8V supply. Each switch can handle rail to rail
analog signals. The off-leakage current is only 4nA max at
+25°C and 30nA max at +85°C with a +3.3V supply.
All digital inputs are 1.8V logic-compatible when using a
single +3V supply.
The ISL43L840 is a dual 4 to 1 multiplexer device that is
offered in a 16 Ld TSSOP and 16 Ld 3x3 QFN packages.
Table 1 summarizes the performance of this family.
TABLE 1. FEATURES AT A GLANCE
ISL43L840
Configuration
Dual 4:1 Mux
www.DataSheet4U.com
3V RON
3V tRANS
1.8V RON
1.8V tRANS
Packages
0.5Ω
19ns
0.62Ω
24ns
16 Ld TSSOP, 16 Ld 3x3 QFN
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
October 12, 2004
ISL43L840
FN6096.1
Features
• ON Resistance (RON)
- V+ = +3.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5Ω
- V+ = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.62Ω
• RON Matching Between Channels. . . . . . . . . . . . . . . . .0.12Ω
• RON Flatness Across Signal Range . . . . . . . . . . . . . .0.056Ω
• Single Supply Operation. . . . . . . . . . . . . . . . . +1.6V to +3.6V
• Low Power Consumption (PD). . . . . . . . . . . . . . . . . . <0.2µW
• Fast Switching Action (VS = +3V)
- tRANS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19ns
• Guaranteed Break-Before-Make
• High Current Handling Capacity (300mA Continuous)
• Available in 16 Ld 3x3 QFN and 16 Ld TSSOP
• 1.8V CMOS-Logic Compatible (+3V Supply)
• Pb-Free Available as an Option (RoHS Compliant)
(see Ordering Info)
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and Video Switching
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL43L840
Test Circuits and Waveforms
LOGIC
INPUT
V+
0V
VA0, VB0
SWITCH
OUTPUT
0V
50%
tTRANS
VOUT
tr < 5ns
tf < 5ns
90%
10%
0V
C
V+
LOGIC
INPUT
V+
C
A0,B0
A1-A3
B1-B3
ADD1-0 GND
COMA
COMB
VOUT
RL
50Ω
CL
35pF
tTRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) R-----L----+---R--R---L--(--O-----N----)
FIGURE 1A. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1B. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
LOGIC
INPUT
OFF
SWITCH
OUTPUT
VOUT
ON
OFF
V+
0V
∆VOUT
RG
Ax, Bx
COMA
0Ω COMB
ADDX
VG GND
LOGIC
INPUT
Q = ∆VOUT x CL
FIGURE 2A. Q MEASUREMENT POINTS
Repeat test for other switches.
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
VOUT
CL
1nF
LOGIC
INPUT
V+
0V
tr < 5ns
tf < 5ns
C
V+
V+
C
A0-A3
B0-B3
ADD1-0
COMA
COMB
VOUT
RL
50Ω
CL
35pF
SWITCH
OUTPUT
VOUT
0V
tBBM
90%
LOGIC
INPUT
GND
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 3A. tBBM MEASUREMENT POINTS
FIGURE 3B. tBBM TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
5 FN6096.1
5 Page 
ISL43L840
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
2X
AD
0.15 C A
9 D/2
D1
6
INDEX
AREA
1
2
3
N
D1/2
2X
0.15 C B
E1/2 E/2
E1 E
2X
0.15 C B
2X
0.15 C A
TOP VIEW
9
B
4X
C
A2 A / / 0.10 C
0.08 C
SEATING PLANE SIDE VIEW
A3 A1
9
4X P
(DATUM B)
4X P
(DATUM A)
6
INDEX
AREA
NX L
8
NX b 5
0.10 M C A B
D2 7 8
D2
2N
NX k
Ne
(Nd-1)Xe
REF.
BOTTOM VIEW
NX b
5
1
2
3
(Ne-1)Xe
E2 REF.
7
E2/2
8
9
CORNER
OPTION 4X
A1
SECTION "C-C"
CL CL
L
L1 10
L
L1 10
e
CC
TERMINAL TIP
e
FOR ODD TERMINAL/SIDE
FOR EVEN TERMINAL/SIDE
L16.3x3
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
NOTES
A 0.80 0.90 1.00 -
A1 -
- 0.05 -
A2 -
- 1.00 9
A3 0.20 REF 9
b 0.18 0.23 0.30 5, 8
D
3.00 BSC
-
D1 2.75 BSC 9
D2 1.35 1.50 1.65 7, 8, 10
E
3.00 BSC
-
E1 2.75 BSC 9
E2 1.35 1.50 1.65 7, 8, 10
e
0.50 BSC
-
k 0.20
-
--
L 0.30 0.40 0.50 8
N 16 2
Nd 4 3
Ne 4 3
P-
- 0.60 9
θ-
- 12 9
Rev. 1 6/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Compliant to JEDEC MO-220VEED-2 Issue C, except for the E2
and D2 MAX dimension.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11 FN6096.1
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ISL43L840.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ISL43L840 | Dual 4 to 1 Analog Multiplexer | Intersil Corporation |
| ISL43L841 | Differential 4 to 1 Analog Multiplexer | Intersil Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |