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PDF LT1027A Data sheet ( Hoja de datos )
| Número de pieza | LT1027A | |
| Descripción | Precision 5V Reference | |
| Fabricantes | Linear Technology | |
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LT1027
Precision
5V Reference
FEATURES
s Very Low Drift: 2ppm/°C Max TC
s Pin Compatible with LT1021-5, REF-02,
(TO-5 and PDIP Packages Only)
s Output Sources 15mA, Sinks 10mA
s Excellent Transient Response Suitable for
A-to-D Reference Inputs
s Noise Reduction Pin
s Excellent Long Term Stability
s Less Than 1ppm P-P Noise (0.1Hz to 10Hz)
U
APPLICATIO S
s A-to-D and D-to-A Converters
s Digital Voltmeters
s Reference Standard
s Precision Current Source
DESCRIPTIO
The LT®1027 is a precision reference with extra-low drift,
superior accuracy, excellent line and load regulation and
low output impedance at high frequency. This device is
intended for use in 12- to 16-bit A-to-D and D-to-A
systems where demanding accuracy requirements must
be met without the use of power hungry, heated substrate
references. The fast settling output recovers quickly from
load transients such as those presented by A-to-D converter
reference inputs. The LT1027 brings together both
outstanding accuracy and temperature coefficient
specifications.
The LT1027 reference is based on LTC’s proprietary
advanced subsurface Zener bipolar process which
eliminates noise and stability problems associated with
surface breakdown devices.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Supplying VREF and VCC to the LTC®1290 12-bit ADC
+
2.2µF
8V TO 40V
VIN
VOUT
LT1027
VTRIM
GND
ANALOG
INPUTS
+
10k 22µF
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
VCC SCLK
ACLK
DOUT
DIN
CS
LTC1290
REF+
REF –
AGND V– DGND
TO µC
1027 TA01
Output Voltage
5.006
5.004
5.002
5.000
4.998
4.996
4.994
–50 –25
0
25 50 75 100
TEMPERATURE (°C)
1027 TA02
1
1 page  
LT1027
APPLICATI S I FOR ATIO
Effect of Reference Drift on System Accuracy
A large portion of the temperature drift error budget in
many systems is the system reference voltage. Figure 1
indicates the maximum temperature coefficient allowable
if the reference is to contribute no more than 0.5LSB error
to the overall system performance. The example shown is
a 12-bit system designed to operate over a temperature
range from 25°C to 65°C. Assuming the system calibra-
tion is performed at 25°C, the temperature span is 40°C.
It can be seen from the graph that the temperature coeffi-
cient of the reference must be no worse than 3ppm/°C if
it is to contribute less than 0.5LSB error. For this reason,
the LT1027 has been optimized for low drift.
100
8-BIT
10-BIT
10
12-BIT
14-BIT
1.0
0 10 20 30 40 50 60 70 80 90 100
TEMPERATURE SPAN (°C)
1027 AI01
Figure 1. Maximum Allowable Reference Drift
Trimming Output Voltage
The LT1027 has an adjustment pin for trimming output
voltage. The impedance of the VADJ pin is about 20kΩ with
an open-circuit voltage of 2.5V. A ±30mV guaranteed trim
range is achievable by tying the VADJ pin to the wiper of a
10k potentiometer connecting between the output and
ground. Trimming output voltage does not affect the TC of
the device.
Noise Reduction
The positive input of the internal scaling amplifier is
brought out as the Noise Reduction (NR) pin. Connecting
a 1µF Mylar capacitor between this pin and ground will
reduce the wideband noise of the LT1027 from 2.0µVRMS
to approximately 1.2µVRMS in a 10Hz to 1kHz bandwidth.
Transient response is not affected by this capacitor. Start-
up settling time will increase to several milliseconds due
to the 7kΩ impedance looking into the NR pin. The
capacitor must be a low leakage type. Electrolytics are not
suitable for this application. Just 100nA leakage current
will result in a 150ppm error in output voltage. This pin is
the most sensitive pin on the device. For maximum protec-
tion a guard ring is recommended. The ring should be
driven from a resistive divider from VOUT set to 4.4V (the
open-circuit voltage on the NR pin).
Transient Response
The LT1027 has been optimized for transient response.
Settling time is under 2µs when an AC-coupled 10mA load
transient is applied to the output. The LT1027 achieves
fast settling by using a class B NPN/PNP output stage.
When sinking current, the device may oscillate with ca-
pacitive loads greater than 100pF. The LT1027 is stable
with all capacitive loads when at no DC load or when
sourcing current, although for best settling time either no
output bypass capactor or a 4.7µF tantalum unit is recom-
mended. An 0.1µF ceramic output capacitor will maximize
output ringing and is not recommended.
Kelvin Connections
Although the LT1027 does not have true force-sense
capability, proper hook-up can improve line loss and
ground loop problems significantly. Since the ground pin
of the LT1027 carries only 2mA, it can be used as a low-
side sense line, greatly reducing ground loop problems on
the low side of the reference. The VOUT pin should be close
to the load or connected via a heavy trace as the resistance
of this trace directly affects load regulation. It is important
to remember that a 1.22mV drop due to trace resistance is
equivalent to a 1LSB error in a 5VFS, 12-bit system.
The circuits in Figures 2 and 3 illustrate proper hook-up to
minimize errors due to ground loops and line losses.
Losses in the output lead can be further reduced by adding
a PNP boost transistor if load current is 5mA or higher. R2
can be added to further reduce current in the output sense
load.
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet LT1027A.PDF ] | |
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