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HY62LF16406C の電気的特性と機能

HY62LF16406CのメーカーはHynix Semiconductorです、この部品の機能は「256Kx16bit full CMOS SRAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 HY62LF16406C
部品説明 256Kx16bit full CMOS SRAM
メーカ Hynix Semiconductor
ロゴ Hynix Semiconductor ロゴ 




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HY62LF16406C Datasheet, HY62LF16406C PDF,ピン配置, 機能
www.DataSheet4U.com
HY62LF16406C Series
256Kx16bit full CMOS SRAM
Document Title
256K x16 bit 2.3 ~ 2.7V Super Low Power FCMOS Slow SRAM
Revision History
Revision No History
00 Initial Draft
01 Changed Logo
02 Changed Isb1 values
Changed part No Q -> L
Draft Date Remark
Dec.20.2000 Final
Mar.23.2001 Final
Jun.07.2001 Final
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility
for use of circuits described. No patent licenses are implied.
Rev.02 / Jun.01
Hynix Semiconductor

1 Page





HY62LF16406C pdf, ピン配列
HY62LF16406C Series
ORDERING INFORMATION
Part No.
HY62LF16404C-DM(I)
HY62LF16404C-SM(I)
Speed
70/85
70/85
Note 1. Blank : Commercial, I : Industrial
Power
LL-part
SL-part
Temp.
I
I
Package
uBGA
uBGA
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
VIN, VOUT
Vcc
TA
TSTG
PD
TSOLDER
Parameter
Input/Output Voltage
Power Supply
Operating Temperature
Storage Temperature
Power Dissipation
Ball Soldering Temperature & Time
Rating
-0.3 to 3.0
-0.3 to 4.0
-40 to 85
-55 to 150
1.0
260 10
Unit
V
V
°C
°C
W
°Csec
Remark
HY62LF16406C-I
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS1 CS2 /WE /OE /LB /UB
Mode
I/O Pin
I/O1~I/O8 I/O9~I/O16
H X X X XX
X L X X X X Deselected
Hi-Z
Hi-Z
X X X X HH
L
H
H
H
L
X
X
L
Output Disabled
Hi-Z
Hi-Z
L H H L LH
DOUT
Hi-Z
HL
Read
Hi-Z
DOUT
LL
DOUT
DOUT
L H L X LH
DIN Hi-Z
HL
Write
Hi-Z
DIN
LL
DIN DIN
Note:
1. H=VIH, L=VIL, X=don't care (VIL or VIH)
2. /UB, /LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When /LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8.
When /UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16.
Power
Standby
Active
Active
Active
Rev.02 / Jun.01
2


3Pages


HY62LF16406C 電子部品, 半導体
HY62LF16406C Series
TIMING DIAGRAM
READ CYCLE 1(Note 1,4)
ADDR
/CS1
tAA
tACS
tRC
tOH
CS2
/UB ,/ LB
/OE
Data
Out
High-Z
tBA
tOE
tOLZ(3)
tBLZ(3)
tCLZ(3)
READ CYCLE 2(Note 1,2,4)
ADDR
Data
Out
tAA
tOH
Previous Data
tRC
READ CYCLE 3(Note 1,2,4)
/CS1
/UB, /LB
tCHZ(3)
tBHZ(3)
tOHZ(3)
Data Valid
Data Valid
tOH
CS2
Data
Out
tACS
tCLZ(3)
Data Valid
tCHZ(3)
Notes:
1. Read Cycle occurs whenever a high on the /WE and /OE is low, while /UB and/or /LB and /CS1 and
CS2 are in active status.
2. /OE = VIL
3. Transition is measured + 200mV from steady state voltage.
This parameter is sampled and not 100% tested.
4. /CS1 in high for the standby, low for active
CS2 in low for the standby, high for active. /UB and /LB in high for the standby, low for active
Rev.02 / Jun.01
5

6 Page



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共有リンク

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部品番号部品説明メーカ
HY62LF16406C

256Kx16bit full CMOS SRAM

Hynix Semiconductor
Hynix Semiconductor
HY62LF16406D

256Kx16bit full CMOS SRAM

Hynix Semiconductor
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