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HY62LF16404D の電気的特性と機能

HY62LF16404DのメーカーはHynix Semiconductorです、この部品の機能は「256Kx16bit full CMOS SRAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 HY62LF16404D
部品説明 256Kx16bit full CMOS SRAM
メーカ Hynix Semiconductor
ロゴ Hynix Semiconductor ロゴ 




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HY62LF16404D Datasheet, HY62LF16404D PDF,ピン配置, 機能
www.DataSheet4U.com
HY62LF16404D Series
256Kx16bit full CMOS SRAM
Document Title
256K x16 bit 2.3 ~ 2.7V Super Low Power FCMOS Slow SRAM
Revision History
Revision No History
00 Initial Draft
01 Changed Logo
02 Changed Isb1 values
Changed part No Q -> L
03 Changed Package Size (6.1mm -> 6.0mm)
Draft Date Remark
Dec.20.2000 Preliminary
Mar.23.2001 Preliminary
Jun.07.2001 Preliminary
Aug.07.2001 Preliminary
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility
for use of circuits described. No patent licenses are implied.
Rev.03 / Aug.01
Hynix Semiconductor

1 Page





HY62LF16404D pdf, ピン配列
HY62LF16404D Series
ORDERING INFORMATION
Part No.
HY62LF16404D-DF(I)
HY62LF16404D-SF(I)
Speed
70/85
70/85
Note 1. Blank : Commercial, I : Industrial
Power
LL-part
SL-part
Temp.
I
I
Package
FBGA
FBGA
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
VIN, VOUT
Vcc
TA
TSTG
PD
TSOLDER
Parameter
Input/Output Voltage
Power Supply
Operating Temperature
Storage Temperature
Power Dissipation
Ball Soldering Temperature & Time
Rating
-0.3 to 3.0
-0.3 to 4.0
40 to 85
-55 to 150
1.0
260 10
Unit
V
V
°C
°C
W
°Csec
Remark
HY62LF16404D-I
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS /WE /OE /LB /UB
Mode
I/O Pin
I/O1~I/O8 I/O9~I/O16
H
X
X
X
X XX
X HH
Deselected
High-Z
High-Z
L
H
H
L
X
X
L
Output Disabled
High-Z
High-Z
LH
DOUT
High-Z
L H L HL
Read
High-Z
DOUT
LL
DOUT
DOUT
LH
DIN High-Z
L L X HL
Write
High-Z
DIN
LL
DIN DIN
Note:
1. H=VIH, L=VIL, X=don't care (VIL or VIH)
2. /UB, /LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When /LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8.
When /UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16.
Power
Standby
Active
Active
Active
Rev.03 / Aug.01
2


3Pages


HY62LF16404D 電子部品, 半導体
HY62LF16404D Series
TIMING DIAGRAM
READ CYCLE 1 (Note 1,4)
ADDR
/CS
tAA
tACS
tRC
/UB ,/ LB
/OE
Data
Out
High-Z
tBA
tOE
tOLZ(3)
tBLZ(3)
tCLZ(3)
tOH
tCHZ(3)
tBHZ(3)
tOHZ(3)
Data Valid
READ CYCLE 2 (Note 1,2,4)
ADDR
Data
Out
tAA
tOH
Previous Data
tRC
READ CYCLE 3(Note 1,2,4)
/CS
/UB, /LB
Data Valid
tOH
Data
Out
tACS
tCLZ(3)
Data Valid
tCHZ(3)
Notes:
1. A read occurs during the overlap of a low /OE, a high /WE, a low /CS and /UB and/or /LB .
2. /OE = VIL
3. Transition is measured + 200mV from steady state voltage.
This parameter is sampled and not 100% tested.
4. /CS in high for the standby, low for active
/UB and /LB in high for the standby, low for active
Rev.03 / Aug.01
5

6 Page



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共有リンク

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部品番号部品説明メーカ
HY62LF16404C

256Kx16bit full CMOS SRAM

Hynix Semiconductor
Hynix Semiconductor
HY62LF16404D

256Kx16bit full CMOS SRAM

Hynix Semiconductor
Hynix Semiconductor


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