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IDT74LVC2245A の電気的特性と機能

IDT74LVC2245AのメーカーはIDTです、この部品の機能は「CMOS OCTAL BUS TRANSCEIVER」です。


製品の詳細 ( Datasheet PDF )

部品番号 IDT74LVC2245A
部品説明 CMOS OCTAL BUS TRANSCEIVER
メーカ IDT
ロゴ IDT ロゴ 




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IDT74LVC2245A Datasheet, IDT74LVC2245A PDF,ピン配置, 機能
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IDT74LVC2245A
3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
3.3V CMOS
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
INDUSTRIALTEMPERATURERANGE
IDT74LVC2245A
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Available in SOIC, SSOP, QSOP, and TSSOP packages
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA (B Port)
• High Output Drivers: ±24mA (A Port)
DESCRIPTION:
This bus transceiver is built using advanced dual metal CMOS technol-
ogy. The LVC2245A device is designed for asynchronous communication
between data buses. The device transmits data from the A bus to the B bus
or from the B bus to the A bus, depending on the logic level at the direction-
control (DIR) input. The output-enable (OE) input can be used to disable
the device so the buses are effectively isolated.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V environment.
The LVC2245A has series resistors in the device output structure of the
"B" port which will significantly reduce line noise when used with light loads.
The driver has been designed to drive ±12mA at the designated threshold
levels.
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
1
DIR
A1 2
19 OE
18
B1
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2000 Integrated Device Technology, Inc.
1
FEBRUARY 2000
DSC-4607/1

1 Page





IDT74LVC2245A pdf, ピン配列
IDT74LVC2245A
3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIALTEMPERATURERANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
Symbol
Parameter
Test Conditions
Min. Typ.(1)
VIH Input HIGH Voltage Level
VCC = 2.3V to 2.7V
1.7 —
VCC = 2.7V to 3.6V
2—
VIL Input LOW Voltage Level
VCC = 2.3V to 2.7V
——
VCC = 2.7V to 3.6V
——
IIH Input Leakage Current
VCC = 3.6V
VI = 0 to 5.5V
——
IIL
IOZH High Impedance Output Current VCC = 3.6V
VO = 0 to 5.5V
——
IOZL (3-State Output pins)
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO 5.5V
——
VIK Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
— –0.7
VH Input Hysteresis
VCC = 3.3V
ICCL Quiescent Power Supply Current VCC = 3.6V
VIN = GND or VCC
ICCH
ICCZ 3.6 VIN 5.5V(2)
ICC Quiescent Power Supply Current One input at VCC - 0.6V, other inputs at VCC or GND
Variation
— 100
——
——
——
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. This applies in the disabled state only.
Max.
0.7
0.8
±5
±10
±50
–1.2
10
10
500
Unit
V
V
µA
µA
µA
V
mV
µA
µA
OUTPUT DRIVE CHARACTERISTICS (A PORT)
Symbol
Parameter
Test Conditions(1)
Min. Max. Unit
VOH Output HIGH Voltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
VCC – 0.2
V
VCC = 2.3V
IOH = – 6mA
2—
VCC = 2.3V
IOH = – 12mA
1.7 —
VCC = 2.7V
2.2 —
VCC = 3V
2.4 —
VCC = 3V
IOH = – 24mA
2—
VOL OutputLOWVoltage
VCC = 2.3V to 3.6V
IOL = 0.1mA
— 0.2 V
VCC = 2.3V
IOL = 6mA
— 0.4
IOL = 12mA
— 0.7
VCC = 2.7V
IOL = 12mA
— 0.4
VCC = 3V
IOL = 24mA
— 0.55
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
3


3Pages


IDT74LVC2245A 電子部品, 半導体
IDT74LVC2245A
3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIALTEMPERATURERANGE
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
Symbol VCC(1)= 3.3V±0.3V VCC(1)= 2.7V
VLOAD
6
6
VIH 2.7
2.7
VT 1.5
1.5
VLZ 300
300
VHZ 300
300
CL 50
50
VCC(2)= 2.5V±0.2V
2 x Vcc
Vcc
Vcc / 2
150
150
30
Unit
V
V
V
mV
mV
pF
VCC
VLOAD
Open
VIN
Pulse (1, 2)
Generator
VOUT
D.U.T.
500GND
RT
500
CL
Test Circuit for All Outputs
LVC Link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate 10MHz; tF 2.5ns; tR 2.5ns.
2. Pulse Generator for All Pulses: Rate 10MHz; tF 2ns; tR 2ns.
SAME PHASE
INPUT TRANSITION
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPHL
tPHL
Propagation Delay
VIH
VT
0V
VOH
VT
VOL
VIH
VT
0V
LVC Link
CONTROL
INPUT
ENABLE
tPZL
DISABLE
tPLZ
OUTPUT
NORMALLY
LOW
SWITCH
VLOAD
tPZH
OUTPUT SWITCH
NORMALLY GND
HIGH
VLOAD/2
VT
tPHZ
VT
0V
VIH
VT
0V
VLOAD/2
VOL+VLZ
VOL
VOH
VOH-VHZ
0V
LVC Link
Enable and Disable Times
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other Tests
Switch
VLOAD
GND
Open
INPUT
OUTPUT 1
OUTPUT 2
tPLH1
tPHL1
tSK (x)
tSK (x)
VIH
VT
0V
VOH
VT
VOL
VOH
VT
VOL
tPLH2
tPHL2
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
LVC Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
tSU tH
tREM
tSU tH
Set-up, Hold, and Release Times
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
VIH
VT
0V
LVC Link
LOW-HIGH-LOW
PULSE
tW
HIGH-LOW-HIGH
PULSE
Pulse Width
VT
VT
LVC Link
6

6 Page



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部品番号部品説明メーカ
IDT74LVC2245A

CMOS OCTAL BUS TRANSCEIVER

IDT
IDT


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