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PDF LTC1261LCS8-4 Data sheet ( Hoja de datos )
| Número de pieza | LTC1261LCS8-4 | |
| Descripción | Switched Capacitor Regulated Voltage Inverter | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC1261L
Switched Capacitor
Regulated Voltage Inverter
FEATURES
s Regulated Negative Voltage from a
Single Positive Supply
s REG Pin Indicates Output is in Regulation
s Adjustable or Fixed Output Voltages
s Output Regulation: ±3.5%
s Supply Current: 650µA Typ
s Shutdown Mode Drops Supply Current to 5µA
s Up to 20mA Output Current
s Requires Only Three or Four External Capacitors
s Available in MS8 and SO-8 Packages
U
APPLICATIO S
s GaAs FET Bias Generators
s Negative Supply Generators
s Battery-Powered Systems
s Single Supply Applications
DESCRIPTIO
The LTC®1261L is a switched-capacitor voltage inverter
designed to provide a regulated negative voltage from a
single positive supply. The LTC1261L operates from a
single 2.7V to 5.25V supply and provides an adjustable
output voltage from –1.23V to – 5V. The LTC1261L-4/
LTC1261L-4.5 needs a single 4.5V to 5.25V supply and
provides a fixed output voltage of – 4V to – 4.5V respec-
tively. Three external capacitors are required: a 0.1µF
flying capacitor and an input and output bypass capaci-
tors. An optional compensation capacitor at ADJ (COMP)
can be used to reduce the output voltage ripple.
Each version of the LTC1261L will supply up to 20mA
output current with guaranteed output regulation of ±3.5%.
The LTC1261L includes an open-drain REG output that
pulls low when the output is within 5% of the set value.
Quiescent current is typically 650µA when operating and
5µA in shutdown.
The LTC1261L is available in 8-pin MSOP and SO pack-
ages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
– 4V Generator with Power Valid
Waveforms for – 4V Generator with Power Valid
0V
5V
5V
1
VCC
SHDN 8
10k
OUT
– 4V
C1
C2
2 C1+
REG 7
1µF
0.1µF
3
LTC1261L-4
C1– OUT
6
4 GND COMP 5
C3*
100pF
POWER VALID
VOUT = –4V
C4 AT 10mA
+ 3.3µF
5V
SHDN
0V
5V
POWER VALID
0V
*OPTIONAL
1261L TA01
0.1ms/DIV
1261L TAO2
1
1 page  
LTC1261L
PIN FUNCTIONS
VCC (Pin 1): Power Supply. This requires an input voltage
between 2.7V and 5.25V. VCC must be bypassed to
ground with at least a 1µF capacitor placed in close
proximity to the chip. See the Applications Information
section for details.
C1+ (Pin 2): C1 Positive Input. Connect a 0.1µF capacitor
between C1+ and C1–.
C1– (Pin 3): C1 Negative Input. Connect a 0.1µF capacitor
from C1+ to C1–.
GND (Pin 4): Ground. Connect to a low impedance
ground. A ground plane will help to minimize regulation
errors.
ADJ (COMP for fixed versions) (Pin 5): Output Adjust/
Compensation Pin. For adjustable parts this pin is used
to set the output voltage. The output voltage is divided
down with an external resistor divider and fed back to this
pin to set the regulated output voltage. Typically the
resistor string should draw ≥ 10µA from the output to
minimize errors due to the bias current at the adjust pin.
Fixed output voltage parts have the internal resistor
string connected to this pin inside the package. The pin
can be used to trim the output voltage if desired. It can
also be used as an optional feedback compensation pin to
reduce output ripple on both the adjustable and fixed
output voltage parts. See the Applications Information
section for more information on compensation and out-
put ripple.
OUT (Pin 6): Negative Voltage Output. This pin must be
bypassed to ground with a 1µF or larger capacitor. The
value of the output capacitor and its ESR have a strong
effect on output ripple. See the Applications Information
section for more details.
REG (Pin 7): This is an open-drain output that pulls low
when the output voltage is within 5% of the set value. It
will sink 5mA to ground with a 5V supply. The external
circuitry must provide a pull-up or REG will not swing
high. The voltage at REG may exceed VCC and can be
pulled up to 6V above ground without damage.
SHDN (Pin 8): Shutdown. When this pin is at ground the
LTC1261L operates normally. An internal 5µA pull-down
keeps SHDN low if it is left floating. When SHDN is pulled
high, the LTC1261L enters shutdown mode. In shut-
down, the charge pump is disabled, the output collapses
to 0V and the quiescent current drops to 5µA typically.
TEST CIRCUITS
Fixed Output
5V
+
10µF
0.1µF
1 VCC
SHDN 8
2 C1+
REG 7
LTC1261L-X
3 C1–
OUT 6
VOUT = – 4V (LTC1261L-4)
VOUT = – 4.5V (LTC1261L-4.5)
4 GND COMP 5 + 3.3µF
1261L TCO1
Adjustable Output
VCC
0.1µF
1
VCC
SHDN 8
2 C1+
REG 7
3
LTC1261L
C1– OUT
6
4
GND
ADJ 5
VOUT
+ 3.3µF
1261L TCO2
5
5 Page 
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8 76 5
LTC1261L
0.192 ± 0.004
(4.88 ± 0.10)
0.118 ± 0.004**
(3.00 ± 0.102)
1 234
0.007
(0.18)
0° – 6° TYP
0.021 ± 0.006
(0.53 ± 0.015)
0.040 ± 0.006
(1.02 ± 0.15)
SEATING
PLANE
0.012
(0.30)
REF
0.0256
(0.65)
TYP
0.034 ± 0.004
(0.86 ± 0.102)
0.006 ± 0.004
(0.15 ± 0.102)
MSOP (MS8) 1197
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8 765
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157**
(3.810 – 3.988)
0.010
(0.254
–
–
0.020
0.508)
×
45°
0.008 – 0.010
(0.203 – 0.254)
1
0°– 8° TYP
0.053 – 0.069
(1.346 – 1.752)
2
34
0.004 – 0.010
(0.101 – 0.254)
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.050
(1.270)
TYP
SO8 0996
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LTC1261LCS8-4.PDF ] | |
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