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PDF LTC1142L Data sheet ( Hoja de datos )
| Número de pieza | LTC1142L | |
| Descripción | Dual High Efficiency Synchronous Step-Down Switching Regulators | |
| Fabricantes | Linear Technology | |
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FEATURES
s Dual Outputs: 3.3V and 5V or User Programmable
s Ultrahigh Efficiency: Over 95% Possible
s Current Mode Operation for Excellent Line and Load
Transient Response
s High Efficiency Maintained over 3 Decades of
Output Current
s Low Standby Current at Light Loads: 160µA/Output
s Independent Micropower Shutdown: IQ < 40µA
s Wide VIN Range: 3.5V to 20V
s Very Low Dropout Operation: 100% Duty Cycle
s Synchronous FET Switching for High Efficiency
s Available in Standard 28-Pin SSOP
U
APPLICATIO S
s Notebook and Palmtop Computers
s Battery-Operated Digital Devices
s Portable Instruments
s DC Power Distribution Systems
LTC1142/LTC1142L/LTC1142HV
Dual High Efficiency
Synchronous Step-Down
Switching Regulators
DESCRIPTIO
The LTC®1142/LTC1142L/LTC1142HV are dual synchro-
nous step-down switching regulator controllers featuring
automatic Burst ModeTM operation to maintain high efficien-
cies at low output currents. The devices are composed of two
separate regulator blocks, each driving a pair of external
complementary power MOSFETs, at switching frequencies
up to 250kHz, using a constant off-time current mode archi-
tecture providing constant ripple current in the inductor.
The operating current level for both regulators is user pro-
grammable via an external current sense resistor. Wide input
supply range allows operation from 3.5V* to 18V (20V
maximum). Constant off-time architecture provides low drop-
out regulation limited only by the RDS(ON) of the external
MOSFET and resistance of the inductor and current sense
resistor.
The LTC1142 series is ideal for applications requiring dual
output voltages with high conversion efficiencies over a wide
load current range in a small amount of board space.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
VIN
5.2V TO 18V
VOUT3
3.3V/2A
RSENSE3
0.05Ω
+ CIN3
22µF
25V
×2
L1
50µH
0.22µF
P-CH
Si9430DY
24
VIN3
23
PDRIVE 3
0V = NORMAL
>1.5V = SHDN
2
SHDN3
16
SHDN5
0.22µF
10
VIN5
9
PDRIVE 5
P-CH
Si9430DY
D1
MBRS130L
+ COUT3
220µF
10V
×2
1000pF
N-CH
Si9410DY
1 SENSE+ 3
SENSE– 3
28
NDRIVE 3
6
PGND3 SGND3 CT3
4 3 25
LTC1142HV
SENSE+ 5 15
SENSE– 5
14
NDRIVE 5
20
ITH3 ITH5 CT5 SGND5 PGND5
27 13 11 17 18
RC3 RC5
1k 1k
RSENSE3, RSENSE5 : DALE WSL-2010-.05
L1, L2: COILTRONICS CTX50-2-MP
PINS 5, 7, 8, 19, 21, 22: NC
CT3 CC3 CC5 CT5
560pF 3300pF 3300pF 390pF
1000pF
N-CH
Si9410DY
NOTE: COMPONENTS OPTIMIZED FOR HIGHEST EFFICIENCY, NOT MINIMUM BOARD SPACE.
Figure 1. High Efficiency Dual 3.3V, 5V Supply
+
CIN5
22µF
25V
×2
L2
50µH
RSENSE5
0.05Ω
VOUT5
5V/2A
D2
MBRS130L
+ COUT5
220µF
10V
×2
1142 F01
1
1 page  
LTC1142/LTC1142L/LTC1142HV
TYPICAL PERFOR A CE CHARACTERISTICS
DC Supply Current
2.1
1.8
1.5 ACTIVE MODE
1.2
PER REGULATOR BLOCK
NOT INCLUDING
0.9 GATE CHARGE CURRENT
PINS 10, 24
0.6
0.3 SLEEP MODE
0
0 2 4 6 8 10 12 14 16 18
INPUT VOLTAGE (V)
1142 G07
Supply Current in Shutdown
20
18
PER REGULATOR BLOCK
PINS 10, 24
16 VSHUTDOWN = 2V
14
12
10
8
6
4
2
0
0 2 4 6 8 10 12 14 16 18
INPUT VOLTAGE (V)
1142 G08
Operating Frequency vs
VIN – VOUT
1.6
VOUT = 5V
1.4
0°C
1.2
1.0 70°C
0.8 25°C
0.6
0.4
0.2
0
0 2 4 6 8 10 12
VIN – VOUT VOLTAGE (V)
1142 G09
Gate Charge Supply Current
28
24
20 QN + QP = 100nC
16
12
8
QN + QP = 50nC
4
0
20 80 140 200 260
OPERATING FREQUENCY (kHz)
1142 G10
Off-Time vs Output Voltage
80
VSENSE = VOUT
70
60
50
40
30
20
10
0
0
VOUT = 3.3V
VOUT = 5V
1 2 34
OUTPUT VOLTAGE (V)
5
1142 G11
Current Sense Threshold Voltage
175
MAXIMUM
150 THRESHOLD
125
100
75
50
MINIMUM
25 THRESHOLD
0
0 20 40 60 80 100
TEMPERATURE (°C)
1142 G12
PI FU CTIO S
LTC1142/LTC1142HV
SENSE+3 (Pin 1): The (+) Input to the 3.3V Section
Current Comparator. A built-in offset between Pins 1 and
28 in conjunction with RSENSE3 sets the current trip
threshold for the 3.3V section.
SHDN3 (Pin 2): When grounded, the 3.3V section oper-
ates normally. Pulling Pin 2 high holds both MOSFETs off
and puts the 3.3V section in micropower shutdown mode.
Requires CMOS logic-level signal with tr, tf < 1µs. Do not
“float” Pin 2.
SGND3 (Pin 3): The 3.3V section small-signal ground
must be routed separately from other grounds to the (–)
terminal of the 3.3V section output capacitor.
PGND3 (Pin 4): The 3.3V section driver power ground
connects to source of N-channel MOSFET and the (–)
terminal of the 3.3V section input capacitor.
NC (Pin 5): No Connection.
NDRIVE 3 (Pin 6): High Current Drive for Bottom N-Channel
MOSFET, 3.3V Section. Voltage swing at Pin 6 is from
ground to VIN3.
5
5 Page 
LTC1142/LTC1142L/LTC1142HV
APPLICATIO S I FOR ATIO
eased at the expense of efficiency. If too small an inductor
is used, the inductor current will decrease past zero and
change polarity. A consequence of this is that the LTC1142
may not enter Burst Modeoperation and efficiency will be
severely degraded at low currents.
Inductor Core Selection
Once the minimum value for L is known, the type of
inductor must be selected. The highest efficiency will be
obtained using ferrite, molypermalloy (MPP), or Kool Mµ®
cores. Lower cost powdered iron cores provide suitable
performance, but cut efficiency by 3% to 7%. Actual core
loss is independent of core size for a fixed inductor value,
but it is very dependent on inductance selected. As induc-
tance increases, core losses go down. Unfortunately,
increased inductance requires more turns of wire and
therefore copper losses will increase.
Ferrite designs have very low core loss, so design goals
can concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple which can cause Burst Mode operation to be falsely
triggered. Do not allow the core to saturate!
Kool Mµ (from Magnetics, Inc.) is a very good, low loss
core material for toroids with a “soft” saturation charac-
teristic. Molypermalloy is slightly more efficient at high
(>200kHz) switching frequencies, but it is quite a bit more
expensive. Toroids are very space efficient, especially
when you can use several layers of wire. Because they
generally lack a bobbin, mounting is more difficult. How-
ever, new designs for surface mount are available from
Coiltronics and Beckman Industrial Corporation which do
not increase the height significantly.
Power MOSFET and D1, D2 Selection
Two external power MOSFETs must be selected for use with
each section of the LTC1142: a P-channel MOSFET for the
main switch, and an N-channel MOSFET for the synchronous
switch. The main selection criteria for the power MOSFETs
are the threshold voltage VGS(TH) and on- resistance RDS(ON).
Kool Mµ is a registered trademark of Magnetics, Inc.
The minimum input voltage determines whether standard
threshold or logic-level threshold MOSFETs must be
used. For VIN > 8V, standard threshold MOSFETs
(VGS(TH) < 4V) may be used. If VIN is expected to drop
below 8V, logic-level threshold MOSFETs (VGS(TH) <
2.5V) are strongly recommended. When logic-level
MOSFETs are used, the LTC1142 supply voltage must
be less than the absolute maximum VGS ratings for the
MOSFETs.
The maximum output current IMAX determines the RDS(ON)
requirement for the two MOSFETs. When the LTC1142 is
operating in continuous mode, the simplifying assump-
tion can be made that one of the two MOSFETs is always
conducting the average load current. The duty cycles for
the two MOSFETs are given by:
P-Ch Duty Cycle = VOUT
VIN
N-Ch Duty Cycle = VIN − VOUT
VIN
From the duty cycles the required RDS(ON) for each
MOSFET can be derived:
( )P-Ch RDS(ON) =
VIN • PP
2
VOUT • IMAX • 1+ δP
( ) ( )N-Ch RDS(ON) =
VIN • PN
VIN − VOUT
•
I
2
MAX
•
1+ δN
where PP and PN are the allowable power dissipations and
δP and δN are the temperature dependencies of RDS(ON).
PP and PN will be determined by efficiency and/or thermal
requirements (see Efficiency Considerations). (1 + δ) is
generally given for a MOSFET in the form of a normalized
RDS(ON) vs Temperature curve, but δ = 0.007/°C can be
used as an approximation for low voltage MOSFETs.
The Schottky diodes D1 and D2 shown in Figure 1 only
conduct during the dead-time between the conduction of
the respective power MOSFETs. The sole purpose of D1
and D2 is to prevent the body diode of the N-channel
MOSFET from turning on and storing charge during the
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC1142L.PDF ] | |
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