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PDF CXK581000ATM Data sheet ( Hoja de datos )
| Número de pieza | CXK581000ATM | |
| Descripción | 131072-word x 8-bit High Speed CMOS Static RAM | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXK581000ATM/AYM/AM/AP
-55LL/70LL/10LL
-55SL/70SL/10SL
131072-word × 8-bit High Speed CMOS Static RAM
For the availability of this product, please contact the sales office.
Description
The CXK581000ATM/AYM/AM/AP is a high speed
CMOS static RAM organized as 131072-words by
8 bits.
A polysilicon TFT cell technology realized extremely low
stand- by current and higher data retention stability.
Special feature are low power consumption, high
speed and broad package line-up.
The CXK581000ATM/AYM/AM/AP ia a suitable
RAM for portable equipment with battery back up.
CXK581000ATM
32 pin TSOP (Plastic)
CXK581000AYM
32 pin TSOP (Plastic)
CXK581000AM
32 pin SOP (Plastic)
CXK581000AP
32 pin DIP (Plastic)
Features
• Fast access time:
CXK581000ATM/AYM/AM/AP
(Access time)
-55LL/55SL
55ns (Max.)
-70LL/70SL
70ns (Max.)
-10LL/10SL
100ns (Max.)
• Low standby current:
CXK581000ATM/AYM/AM/AP
-55LL/70LL/10LL
20µA (Max.)
-55SL/70SL/10SL
12µA (Max.)
• Low data retention current
CXK581000ATM/AYM/AM/AP
-55LL/70LL/10LL
12µA (Max.)
-55SL/70SL/10SL
4µA (Max.)
• Single +5V supply: +5V ±10%
• Low voltage data retention: 2.0V (Min.)
• Broad package line-up
• CXK581000ATM/AYM
8mm × 20mm 32 pin TSOP package
• CXK581000AM 525mil 32 pin SOP package
• CXK581000AP 600mil 32 pin DIP package
Block Diagram
A10
A11
A9
A8 VCC
A13
A15
Buffer
Row
Decoder
Memory
Matrix
1024 × 1024
A16 GND
A14
A12
A7
A6
A5
A4
A3 Buffer
A2
A1
A0
I/O Gate
Column
Decoder
Functions
131072-word × 8-bit static RAM
Structure
Silicon gate CMOS IC
OE
Buffer
WE
CE1
CE2
I/O Buffer
I/O 1 I/O 8
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E92756D53-PP
1 page  
CXK581000ATM/AYM/AM/AP
• Read cycle (WE = "H")
-55LL/55SL -70LL/70SL -10LL/10SL
Item Symbol Min. Max. Min. Max. Min. Max. Unit
Read cycle time
Address access time
tRC 55 — 70 — 100 —
tAA — 55 — 70 — 100
Chip enable access time (CE1)
tCO1 — 55 — 70 — 100
Chip enable access time (CE2)
tCO2 — 55 — 70 — 100
Output enable to output valid
Output hold from address change
tOE — 30 — 40 — 50 ns
tOH 15 — 15 — 15 —
Chip enable to output in low Z (CE1, CE2) tLZ1, tLZ2 10 — 10 — 10 —
Output enable to output in low Z (OE)
tOLZ
5 —5—5—
Chip disable to output in high Z (CE1, CE2) tHZ1, tHZ2∗ — 25 — 25 — 35
Output disable to output in high Z (OE)
tOHZ∗
— 25 — 25 — 35
∗ tHZ1, tHZ2 and tOHZ are defined as the time required for outputs to turn to high impedance state and are not
referred to as output voltage levels.
• Write cycle
-55LL/55SL -70LL/70SL -10LL/10SL
Item Symbol Min. Max. Min. Max. Min. Max. Unit
Write cycle time
Address valid to end of write
Chip enable to end of write
Data to write time overlap
Data hold from write time
Write pulse width
Address setup time
Write recovery time (WE)
Write recovery time (CE1, CE2)
Output active from end of write
Write to output in high Z
tWC
tAW
tCW
tDW
tDH
tWP
tAS
tWR
tWR1
tOW
tWHZ∗
55 — 70 — 100 —
50 — 60 — 70 —
50 — 60 — 70 —
25 — 30 — 40 —
0 — 0 — 0 — ns
40 — 50 — 70 —
0 —0—0—
0 —0—0—
0 —0—0—
10 — 10 — 10 —
— 25 — 25 — 30
∗ tWHZ is defined as the time required for outputs to turn to high impedance state and is not referred to as
output voltage level.
–5–
5 Page 
CXK581000ATM/AYM/AM/AP
Package Outline
Unit: mm
CXK581000ATM
32PIN TSOP (I) (PLASTIC)
8.0 ± 0.2
32 17
+ 0.2
1.07 – 0.1
0.1
0.1 ± 0.1
+ 0.08 1
0.2 – 0.03
0.08 M
16
0.5
A
+ 0.05
0.127 – 0.02
0° to 10°
DETAIL A
NOTE: Dimension “∗” does not include mold protrusion.
SONY CODE
EIAJ CODE
JEDEC CODE
TSOP (I) -32P-L01
TSOP (I) 032-P-0820-A
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
EPOXY / PHENOL RESIN
SOLDER PLATING
42 ALLOY
CXK581000AYM
32PIN TSOP (PLASTIC)
8.0 ± 0.2
17 32
+ 0.2
1.07 – 0.1
0.1
16
+ 0.08
0.2 – 0.03
0.08 M
1
0.5
A
0.1 ± 0.1
+ 0.05
0.127 – 0.02
0° to 10°
NOTE: Dimension “∗” does not include mold protrusion.
DETAIL A
PACKAGE STRUCTURE
SONY CODE
EIAJ CODE
JEDEC CODE
TSOP-32P-L01R
TSOP032-P-0820-B
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
EPOXY RESIN
SOLDER PLATING
42 ALLOY
0.3g
– 11 –
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet CXK581000ATM.PDF ] | |
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