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PDF LTC1606AC Data sheet ( Hoja de datos )
| Número de pieza | LTC1606AC | |
| Descripción | 16-Bit/ 250ksps/ Single Supply ADC | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s Sample Rate: 250ksps
s Single 5V Supply
s Bipolar Input Range: ±10V
s Signal-to-Noise Ratio: 90dB Typ
s Power Dissipation: 75mW Typ
s Integral Nonlinearity: ±2.0LSB Max
s Guaranteed No Missing Codes
s Operates with Internal or External Reference
s Internal Synchronized Clock
s 28-Pin SSOP Package
s Improved 2nd Source to AD976A and ADS7805
U
APPLICATIONS
s Industrial Process Control
s Multiplexed Data Acquisition Systems
s High Speed Data Acquisition for PCs
s Digital Signal Processing
Final Electrical Specifications
LTC1606
16-Bit, 250ksps,
Single Supply ADC
March 2000
DESCRIPTION
The LTC®1606 is a 250ksps, sampling 16-bit A/D con-
verter that draws only 75mW (typical) from a single 5V
supply. This easy-to-use device includes sample-and-
hold, precision reference, switched capacitor successive
approximation A/D and trimmed internal clock.
The LTC1606’s input range is an industry standard ±10V.
Maximum DC specs include ±2.0LSB INL and 16 bits no
missing codes over temperature. An external reference
can be used if greater accuracy over temperature is
needed.
The 90dB signal-to-noise ratio offers an improvement of
3dB over competing devices, and the RMS transition noise
is reduced (0.65LSB vs 1LSB) relative to competitive
parts.
The ADC has a microprocessor compatible, 16-bit or two
byte parallel output port. A convert start input and a data
ready signal (BUSY) ease connections to FIFOs, DSPs and
microprocessors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Low Power, 250kHz, 16-Bit Sampling ADC on 5V Supply
±10V 200Ω 1 VIN
INPUT
33.2k
4.096V
10µF
4 CAP
3 REF
2.5V
2.2µF
5V
28 27
VDIG VANA
7.35k
2.5k 9k
10µF
0.1µF
16-BIT
SAMPLING ADC
6 TO 13
15 TO 22
D15 TO D0
16-BIT
OR 2 BYTE
PARALLEL
BUS
1.64x
BUFFER
4k
REFERENCE
CONTROL
LOGIC AND
TIMING
AGND1 AGND2 DGND
2 5 14
BUSY 26
CS 25
R/C 24
BYTE 23
DIGITAL
CONTROL
SIGNALS
1606 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1
1 page  
LTC1606
POWER REQUIREMENTS The q indicates specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
LTC1606/LTC1606A
MIN TYP MAX
UNITS
VDD Positive Supply Voltage
IDD Positive Supply Current
PDIS Power Dissipation
(Notes 9, 10)
4.75 5.25 V
q 15 20 mA
q 75 100 mW
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND, AGND1
and AGND2 wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below ground or above VANA =
VDIG = VDD, they will be clamped by internal diodes. This product can
handle input currents of greater than 100mA below ground or above VDD
without latch-up.
Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
90mA below ground without latchup. These pins are not clamped to VDD.
Note 5: VDD = 5V, fSAMPLE = 250kHz, tr = tf = 5ns unless otherwise
specified.
Note 6: Linearity, offset and full-scale specifications apply for a VIN input
with respect to ground.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 0.5 LSB when
the output code flickers between 0000 0000 0000 0000 and 1111 1111
1111 1111.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: With CS low the falling R/C edge starts a conversion. If R/C
returns high at a critical point during the conversion, it can create errors.
For best results, ensure that R/C returns high within 1µs after the start of
the conversion.
Note 12: As measured with fixed resistors shown in Figure 4. Adjustable to
zero with external potentiometer.
Note 13: Full-scale error is the worst-case of –FS or +FS untrimmed
deviation from ideal first and last code transitions, divided by the transition
voltage (not divided by the full-scale range) and includes the effect of
offset error.
Note 14: All specifications in dB are referred to a full-scale ±10V input.
Note 15: Full-power bandwidth is defined as full-scale input frequency at
which a signal-to-(noise + distortion) degrades to 60dB or 10 bits of
accuracy.
Note 16: Recovers to specified performance after (2 • FS) input
overvoltage.
PIN FUNCTIONS
VIN (Pin 1): Analog Input. Connect through a 200Ω
resistor to the analog input. Full-scale input range is
±10V.
AGND1 (Pin 2): Analog Ground. Tie to analog ground
plane.
REF (Pin 3): 2.5V Reference Output. Bypass with 2.2µF
tantalum capacitor. Can be driven with an external refer-
ence.
CAP (Pin 4): Reference Buffer Output. Bypass with 10µF
tantalum capacitor. The capacitor output voltage is 4.096V
when REF = 2.5V.
AGND2 (Pin 5): Analog Ground. Tie to analog ground
plane.
D15 to D8 (Pins 6 to 13): Three-State Data Outputs.
Hi-Z state when CS is high or when R/C is low.
DGND (Pin 14): Digital Ground.
D7 to D0 (Pins 15 to 22): Three-State Data Outputs.
Hi-Z state when CS is high or when R/C is low.
BYTE (Pin 23): Byte Select. With BYTE low, data will be
output with Pin 6 (D15) being the MSB and Pin 22 (D0)
being the LSB. With BYTE high the upper eight bits and
the lower eight bits will be switched. The MSB is output
on Pin 15 and bit 8 is output on Pin 22. Bit 7 is output on
Pin 6 and the LSB is output on Pin 13.
R/C (Pin 24): Read/Convert Input. With CS low, a falling
edge on R/C puts the internal sample-and-hold into the
hold state and starts a conversion. With CS low, a rising
edge on R/C enables the output data bits.
5
5 Page 
LTC1606
APPLICATIONS INFORMATION
Output Data
The output data can be read as a 16-bit word or it can be
read as two 8-bit bytes. The format of the output data is
two’s complement. The digital input pin BYTE is used to
control the two byte read. With the BYTE pin low, the first
eight MSBs are output on the D15 to D8 pins and the eight
LSBs are output on the D7 to D0 pins. When the BYTE pin
is taken high, the eight LSBs replace the eight MSBs
(Figure 10).
Dynamic Performance
FFT (Fast Fourier Transform) test techniques are used to
test the ADC’s frequency response, distortion and noise at
the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT algo-
rithm, the ADC’s spectral content can be examined for
frequencies outside the fundamental.
Signal-to-Noise Ratio
The Signal-to-Noise and Distortion Ratio (SINAD) is the
ratio between the RMS amplitude of the fundamental input
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
to frequencies from above DC and below half the sampling
frequency. A typical LTC1606 has a SINAD of 90dB and
THD of –102dB with a 250kHz sampling rate and a 1kHz
input.
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal to the fundamental
itself. The out-of-band harmonics alias into the frequency
band between DC and half the sampling frequency. THD is
expressed as:
THD
=
20log√V22
+
V32
+ V42
V1
...
+
VN2
where V1 is the RMS amplitude of the fundamental fre-
quency and V2 through VN are the amplitudes of the
second through Nth harmonics.
Board Layout, Power Supplies and Decoupling
Wire wrap boards and molded sockets are not recom-
mended for high resolution or high speed A/D converters.
To obtain the best performance from the LTC1606, a
printed circuit board is required. Layout for the printed
circuit board should ensure the digital and analog signal
lines are separated as much as possible. In particular, care
should be taken not to run any digital track alongside an
analog signal track or underneath the ADC. The analog
input should be screened by AGND.
Pay particular attention to the design of the analog and
digital ground planes. The DGND pin of the LTC1606
should be tied to the analog ground plane. Placing the
bypass capacitor as close as possible to the power supply,
the reference and reference buffer output is very impor-
tant. Low impedance common returns for these bypass
capacitors are essential to low noise operation of the ADC,
and the foil width for these tracks should be as wide as
possible. Also, since any potential difference in grounds
between the signal source and ADC appears as an error
voltage in series with the input signal, attention should be
paid to reducing the ground circuit impedance as much as
possible.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LTC1606AC.PDF ] | |
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