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PDF AN805 Data sheet ( Hoja de datos )
| Número de pieza | AN805 | |
| Descripción | PWM Optimized Power MOSFETs for Low-Voltage DC/DC Conversion | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AN805 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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AN805
Vishay Siliconix
PWM Optimized Power MOSFETs
for Low-Voltage DC/DC Conversion
Designers of low-voltage dc-to-dc converters have two main
concerns: reducing size and reducing losses. As a way of reducing
size, designers are increasing switching frequencies. But the result
has been reduced converter efficiency. To minimize losses,
MOSFET manufacturers have generally focused on lowering
on-resistance. But the results have not been optimal for dc-to-dc
conversion designs, since gate charge and switching speed issues
have been largely ignored. The dominant losses associated with
MOSFETs were once conduction losses, but this is no longer the
case.
Vishay Siliconix’s new family of PWM optimized MOSFETs has
been designed to give the highest efficiency available for a given
on-resistance in switching applications such as dc-to-dc
conversion. These new devices provide a very low gate charge
per unit of on-resistance, in addition to fast switching times. The
result is reduced gate drive and crossover losses, allowing
designers of dc-to-dc converters to simultaneously reduce the
design footprint and increase efficiency.
MOSFET Losses
A simplistic model of power loss in a MOSFET used in a dc-to-dc
converter (Figure 1) can be calculated if we know the RMS, the
current through the MOSFET, the duty cycle, the gate voltage, and
the rDS(on) of the MOSFET. This model can then be used to
compare the efficiency of designs using Vishay Siliconix’s new
PWM optimized MOSFETs versus conventional and low-threshold
power MOSFETs.
The equation that defines the losses associated only with
on-resistance and the gate drive is:
P + I2RMS
rDS(on)ƪVGSƫ ƪTJƫ
D ) QgƪVGSƫ VGS f (Watts) Eq1
40 40
Si6801 Power Loss, QG, rDS VGS
30 30
0.8
0.6
20 20
0.4
10 10
0.2
00
0
0 1 234 567
V GS
FIGURE 2. Power loss for PWM optimized Si6801 p-channel
MOSFET as a function of VGS and switching
frequency.
Document Number: 70649
January 1997
[ ] The value of the parameter before the parenthesis is dependent
on the parameter within the parenthesis.
IRMS
Drain
Gate
Crss
RG
Ciss
rDS(on)
Coss
Source
FIGURE 1. Generic MOSFET model with body diode omitted.
where:
I2RMS
rDS(on)
VGS
[TJ]
D
Qg
f
The RMS current in the MOSFET (A)
On-resistance of the device for a given drive voltage
and junction temperature.
The peak driver gate voltage for the MOSFET (V)
Junction temperature of the MOSFET
Duty factor of the MOSFET (Ratio of on time to off
time)
Total gate charge for the MOSFET at a given gate
voltage (C)
Frequency of MOSFET switching (Hz)
Using Equation 1 we can obtain a plot of power loss (gate loss +
rDS(on) loss) as a function of gate voltage at varying switching
frequencies (Figure 2). [1]
Technology Comparison: 1 MHz Power Loss
50
40
30
20
10
1 23 4567
V GS
FIGURE 3. Gate losses and on-resistance losses for PWM
optimized power MOSFET (Si6801DQ) versus
conventional (Si6542DQ) and low-threshold
(Si6552DQ) power MOSFETs.
www.vishay.com S FaxBack 408-970-5600
1
1 page  
AN805
Vishay Siliconix
A power MOSFET is made up of many single MOSFET cells
arranged in a parallel combination. In an ideal MOSFET all the
cells will turn on together when activated by a gate signal, and a
minimum switching time transition will be obtained. This does not
happen in a conventional MOSFET layout because the gate signal
has to propagate across the silicon in a turn-on “wave,” where the
cells nearest the gate bus turn on first with the outer cells following.
The PWM optimized MOSFET has symmetrical gate bussing, and
its bonding and layout structures minimize the turn-on “wave,” thus
increasing the switching speed of the device.
Efficiency
How much extra efficiency does the PWM optimized MOSFET
provide? A comparison of the efficiency of the synchronous boost
converter (Figure 4) using three different MOSFET technologies
shows that an improvement on the order of 5% can be made if an
optimized device is used.
100.00
Figures 6, 7, and 8 show efficiency at switching frequencies
ranging from 300 kHz to 1.8 MHz, while Figure 9 summarizes the
efficiencies of the three technologies against switching frequency
at an output current of 400 mA. For all the results shown, the input
voltage for the synchronous boost converter was 3.6 V, with an
output voltage of 5 V.
The PWM optimized MOSFET surpasses all other technologies
while maintaining the highest efficiencies over the broadest load
ranges at all switching frequencies. The conventional MOSFET
technology provides the same breadth of efficiency but at a
reduced value. The low- threshold technology is clearly unsuited to
switching at higher switching frequencies with a gate voltage of
4.5 V.
As summarized in Table 1, at all switching frequencies the PWM
optimized MOSFET technology gives superior performance, both
in highest peak efficiencies and over the broadest load range,
making it the ideal choice for most low-voltage dc-to-dc designs.
100.00
90.00
90.00
h% 80.00
70.00
60.00
0.0
h % 6801 300 kHz
h % 6542 300 kHz
h % 6552 300 kHz
200.0 400.0 600.0 800.0 1000.0
Output Current 0 to 1000 mA
FIGURE 6. Efficiency comparison between high-frequency,
conventional, and low-threshold MOSFETs at a
switching frequency of 300 kHz.
80.00
h%
70.00
60.00
0.0
h % 6801 1 kHz
h % 6542 1 kHz
h % 6552 1 kHz
200.0 400.0 600.0 800.0 1000.0
Output Current 0 to 1000mA
FIGURE 7. Efficiency comparison between high-frequency,
conventional and low-threshold MOSFETs at a
switching frequency of 300 kHz
100.00
90.00
80.00
h%
70.00
60.00
0.0
h % 6801 1.8 MHz
h % 6542 1.8 MHz
h % 6552 1.8 MHz
200.0 400.0 600.0 800.0 1000.0
Output Current 0 to 1000mA
FIGURE 8. Efficiency comparison between high-frequency,
conventional, and low-threshold MOSFETs at a
switching frequency of 1.8 MHz.
Document Number: 70649
January 1997
100
95
90
h% 85
80
75
70
0
h % 6801 400 mA
h % 6542 400 mA
h % 6552 400 mA
500 1000 1500 2000
Switching Frequency (kHz)
FIGURE 9. Efficiency vs. switching frequency comparing the
PWM optimized MOSFET technology with
conventional and low-threshold technologies
www.vishay.com S FaxBack 408-970-5600
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet AN805.PDF ] | |
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