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PDF AK4363 Data sheet ( Hoja de datos )

Número de pieza AK4363
Descripción 96kHz 24-Bit DAC
Fabricantes Asahi Kasei Microsystems 
Logotipo Asahi Kasei Microsystems Logotipo



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No Preview Available ! AK4363 Hoja de datos, Descripción, Manual

ASAHI KASEI
[AK4363]
AK4363
96kHz 24Bit ∆Σ DAC with PLL
GENERAL DESCRIPTION
The AK4363 is a stereo CMOS D/A Converter and Phase Locked Loop for use in digital video broadcast
set-top box applications or DVD. The DAC signal outputs are single-ended and are analog filtered to
remove out of band noise. Therefore no external filters are required. The PLL provides selectable
sampling clock frequencies locked to the 27MHz recovered MPEG clock.
FEATURES
o Stereo ∆Σ DAC
o S/(N+D): 90dB@5V
o DR:
102dB@5V
o S/N:
102dB@5V
o Multiple Sampling Frequencies:
16kHz, 22.05kHz, 24kHz (Half speed)
32kHz, 44.1kHz, 48kHz (Normal speed)
64kHz, 88.2kHz, 96kHz (Double speed)
o On-Chip Low Jitter Analog PLL:
Multiple Master Clock Frequencies generated from 27MHz
256fs/384fs/512fs/768fs/1024fs/1536fs for Half speed
256fs/384fs/512fs/768fs
for Normal speed
128fs/192fs/256fs/384fs
for Double speed
o Master Clock: PLL / External
o Data Input Formats:
LSB justified / MSB justified / I2S selectable
o Selectable Function:
Soft Mute
Digital Attenuator (256 Steps)
Digital De-emphasis (44.1kHz/48kHz/32kHz)
o Output Mode: Stereo, Mono, Reverse, Mute
o Input Level:TTL/CMOS Selectable
o Output Level: 3.0Vpp@5V
o Control mode: 3-wire Serial / I2C Bus
o Low Power Dissipation: 80mW@5V
o Small 24pin VSOP Package
o Power Supply: 2.75.5V
o Ta: -4085°C
MS0015-E-02
-1-
2001/05

1 page




AK4363 pdf
ASAHI KASEI
[AK4363]
ABSOLUTE MAXIMUM RATINGS
(AVSS, DVSS=0V; Note 1)
Parameter
Symbol
min
Power Supplies Analog
AVDD
-0.3
Digital
DVDD
-0.3
|AVSS-DVSS| (Note 2) GND
-
Input Current (any pins except for supplies)
IIN
-
Analog Input Voltage
VINA
-0.3
Digital Input Voltage
VIND
-0.3
Ambient Temperature
Ta -40
Storage Temperature
Tstg -65
Note:1. All voltages with respect to ground.
2. AVSS and DVSS must be connected to the same analog ground plane.
max
6.0
6.0
0.3
±10
AVDD+0.3
DVDD+0.3
85
150
Units
V
V
V
mA
V
V
°C
°C
WARNING: Operation at or beyond these limits may results in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
(AVSS, DVSS=0V; Note 1)
Parameter
Symbol
min
typ
Power Supplies
3V operation (TTL = “L”)
(Note 3)
Analog
AVDD
2.7
3.0
Digital
DVDD
2.7
3.0
5V operation (TTL = “H”)
Analog
AVDD
4.5
5.0
Digital
DVDD
4.5
5.0
max
5.5
3.6 or AVDD
5.5
AVDD
Note:1. All voltages with respect to ground.
3. The power up sequence between AVDD and DVDD is not critical.
Units
V
V
V
V
*AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
MS0015-E-02
-5-
2001/05

5 Page





AK4363 arduino
ASAHI KASEI
[AK4363]
Parameter
Control Interface Timing (3-wire Serial mode):
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “” to CCLK “
CCLK “” to CSN “
Control Interface Timing (I2C Bus mode):
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
(Note 12)
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Pulse Width of Spike Noise suppressed by Input Filter
Symbol
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
fSCL
tBUF
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
tF
tSU:STO
tSP
min
200
80
80
40
40
150
50
50
-
4.7
4.0
4.7
4.0
4.7
0
0.25
-
-
4.0
0
typ
Note:12. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
max Units
ns
ns
ns
ns
ns
ns
ns
ns
100 kHz
- µs
- µs
- µs
- µs
- µs
- µs
- µs
1.0 µs
0.3 µs
- µs
50 ns
MS0015-E-02
- 11 -
2001/05

11 Page







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