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PDF CYBLE-224110-00 Data sheet ( Hoja de datos )
| Número de pieza | CYBLE-224110-00 | |
| Descripción | EZ-BLE PRoC XT/XR Module | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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PRELIMINARY
CYBLE-224110-00
EZ-BLE™ PSoC® XT/XR Module
General Description
The Cypress CYBLE-224110-00 is a fully certified and qualified
module supporting Bluetooth Low Energy (BLE) wireless
communication. The CYBLE-224110-00 is a turnkey solution
that includes onboard power amplifier (PA), low noise amplifier
(LNA), crystal oscillators, chip antenna, passive components,
and the Cypress PSoC® 4 BLE. Refer to the PSoC 4 BLE
datasheet for additional details on the capabilities of the PSoC 4
BLE device used on this module.
The EZ-BLE PSoC® XT/XR module provides extended
industrial temperature operation (XT) and extended
communication range (XR). The EZ-BLE XT/XR module is a
scalable and reconfigurable platform architecture, combining
programmable and reconfigurable analog and digital blocks with
flexible automatic routing. The CYBLE-224110-00 also includes
digital programmable logic, high-performance analog-to-digital
conversion (ADC), opamps with comparator mode, and standard
communication and timing peripherals.
The CYBLE-224110-00 includes a royalty-free BLE stack
compatible with Bluetooth 4.1 and provides up to 25 GPIOs in a
small 9.5 × 15.4 × 1.80 mm footprint.
Module Description
■ Module size: 9.5 mm × 15.4 mm × 1.80 mm (with shield)
■ Extended Range: Up to 400 meters line-of-sight
■ Extended industrial temperature range: –40 °C to +105 °C
■ Up to 25 GPIOs
■ 256-KB flash memory, 32-KB SRAM memory
■ Bluetooth 4.1 qualified single-mode module
■ Certified to FCC, CE, MIC, KC, and IC regulations
■ 32-bit processor (0.9 DMIPS/MHz) with single-cycle 32-bit
multiply, operating at up to 48 MHz
■ Watchdog timer with dedicated internal low-speed oscillator
■ Two-pin SWD for programming
Power Consumption
■ TX output power: –18 dbm to +9.5 dbm
■ RX Receive Sensitivity: –95 dbm
■ Received signal strength indicator (RSSI) with 1-dB resolution
■ 1 Second connection interval with PA/LNA active: 26.3 µA
■ TX current consumption:
❐ BLE silicon: 15.6 mA (radio only, 0 dbm)
❐ SE2438T: 20 mA (PA/LNA only, +9.5 dBm)
■ RX current consumption of 16.4 mA (radio only)
❐ BLE silicon: 16.4 mA (radio only)
❐ SE2438T: 5.5 mA (PA/LNA only)
■ Low power mode support
❐ Deep Sleep: 1.3 µA with watch crystal oscillator (WCO) on
❐ Hibernate: 150 nA with SRAM retention
❐ Stop: 60 nA with XRES wakeup
Integrated PA/LNA
■ Supports output power up to +9.5 dBm and RXS of -95 dBm
Programmable Analog
■ Four opamps with reconfigurable high-drive external and
high-bandwidth internal drive, comparator modes, and ADC
input buffering capability; can operate in Deep-Sleep mode
■ 12-bit, 1-Msps SAR ADC with differential and single-ended
modes; channel sequencer with signal averaging
■ Two current DACs (IDACs) for general-purpose or capacitive
sensing applications on any pin
■ One low-power comparator that operate in Deep-Sleep mode
Programmable Digital
■ Four programmable logic blocks called universal digital blocks,
(UDBs), each with eight macrocells and datapath
■ Cypress-provided peripheral Component library, user-defined
state machines, and Verilog input
Capacitive Sensing
■ Cypress CapSense Sigma-Delta (CSD) provides best-in-class
SNR (> 5:1) and liquid tolerance
■ Cypress-supplied software component makes
capacitive-sensing design easy
■ Automatic hardware-tuning algorithm (SmartSense™)
Segment LCD Drive
■ LCD drive supported on all GPIOs (common or segment)
■ Operates in Deep-Sleep mode with four bits per pin memory
Serial Communication
■ Two independent runtime reconfigurable serial communication
blocks (SCBs) with I2C, SPI, or UART functionality
Timing and Pulse-Width Modulation
■ Four 16-bit timer, counter, pulse-width modulator (TCPWM)
blocks
■ Center-aligned, Edge, and Pseudo-random modes
■ Comparator-based triggering of Kill signals for motor drive and
other high-reliability digital logic applications
Up to 25 Programmable GPIOs
■ Any GPIO pin can be CapSense, LCD, analog, or digital
■ Two overvoltage-tolerant (OVT) pins; drive modes, strengths,
and slew rates are programmable
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-11264 Rev. **
• San Jose, CA 95134-1709 • 408-943-2600
Revised February 22, 2016
1 page  
PRELIMINARY
Figure 1. Module Mechanical Drawing
CYBLE-224110-00
Top View
Side View
Bottom View
Note
1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on
recommended host PCB layout, see Figure 3 on page 7, Figure 4 and Figure 5 on page 8, Figure 6 and Table 3 on page 9.
Document Number: 002-11264 Rev. **
Page 5 of 43
5 Page 
PRELIMINARY
CYBLE-224110-00
Table 5. Analog Peripheral Capabilities
Pad Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Device Port Pin
GND[3]
XRES
P1.5
P1.1
P1.0
P0.1
P0.4
P0.5
P0.7
P1.3
VDDR
P0.6
P1.2
VDD
P1.4
P2.1
VDDA
P2.2
P2.6
P3.0
21 P2.3
22 VREF
23 P3.4
24 P3.5
25 P3.7
26 P3.1
27 P3.6
28 P2.5
29 P5.0
30 P5.1
31 P2.4
32 GND
SARMUX
✓
✓
✓
✓
✓
✓
OPAMP
LPCOMP
Ground Connection
External Reset Hardware Connection Input
✓(CTBm1_OA1_INP)
✓(CTBm1_OA0_INN)
✓(CTBm1_OA0_INP)
✓(CTBm1_OA1_OUT)
✓(COMP0_INN)
✓(COMP1_INP)
✓(COMP1_INN)
Radio Power Supply (2.0V to 3.6V)
✓(CTBm1_OA0_OUT)
Digital Power Supply Input (1.71 to 5.5V)
✓(CTBm1_OA1_INN)
✓(CTBm1_OA0_INN)
Analog Power Supply Input (1.71 to 5.5V)
✓(CTBm1_OA0_OUT)
✓(CTBm1_OA0_INP)
✓(CTBm1_OA1_OUT)
Reference Voltage Input (Optional)
✓(CTBm0_OA1_INP)
✓(CTBm0_OA1_INN)
Ground Connection
Notes
2. TCPWM stands for timer, counter, and PWM. If supported, the pad can be configured to any of these peripheral functions.
3. The main board needs to connect both GND connections (Pad 1 and Pad 32) on the module to the common ground of the system.
Document Number: 002-11264 Rev. **
Page 11 of 43
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