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Número de pieza | RT4812 | |
Descripción | High Efficiency Boost Converter | |
Fabricantes | Richtek Technology | |
Logotipo | ||
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No Preview Available ! RT4812
High Efficiency Boost Converter
General Description
The RT4812 allows systems to take advantage of new
battery chemistries that can supply significant energy
when the battery voltage is lower than the required
voltage for system power ICs. By combining built-in
power transistors, synchronous rectification, and low
supply current; this IC provides a compact solution for
systems using advanced Li-Ion battery chemistries.
The RT4812 is a boost regulator designed to provide a
minimum output voltage from a single-cell Li-Ion battery,
even when the battery voltage is below system
minimum. In boost mode, output voltage regulation is
guaranteed to a maximum load current of 2A.
Quiescent current in Shutdown Mode is less than 1A,
which maximizes battery life.
Ordering Information
RT4812
Package Type
J8F : TSOT-23-8 (FC)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Features
CMCOT Topology and Small Output Ripple
when VIN close VOUT Voltage
Operates from a Single Li-ion Cell : 1.8V to 5.5V
Adjustable Output Voltage : 1.8V to 5.5V
PSM Operation
Up to 96% Efficiency
Boost Current Limit
Input/Output Over Voltage Protection
Pin Adjustable Current Limit Threshold
(2 levels)
Internal Compensation
Output Discharge
Output Short Protection
True Load Disconnect
Applications
Single-Cell Li-Ion, LiFePO4 Smart-Phones
Portable Equipment
Marking Information
0L=DNN
0L= : Product Code
DNN : Date Code
Simplified Application Circuit
L1
VIN
C1
C2
H/L
RT4812
SW VOUT
VIN FB
EN
ILIM
GND
VOUT
R1 CFF C3
R2
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS4812-00 June 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
1 page RT4812
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Low Side Switch Ron
VIN = 5V
-- 20 -- m
FB Pin Input Leakage
IFB
ADJ mode
1 --
1 A
Leakage of SW
ISW All switch off
-- -- 5 A
Line Regulation
Load Regulation
VOUT, LINE
VOUT, LOAD
PVIN = 2.7V to 4.5V, VOUT = 5V,
IOUT = 1500mA
CCM, IOUT 2A, PVIN = 3.6V,
VOUT = 5V
2
1.5
--
--
2%
1.5 %
Output Over Voltage
Protection
VOVP
5.8 6 6.2 V
EN Input Low Voltage
VIL
-- -- 0.4 V
EN Input High Voltage
VIH
1.2 --
-- V
EN -- 0.1 1 A
Thermal Shutdown
TSD
-- 160
C
Thermal Shutdown
Hysteresis
TSD
-- 30
C
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured at TA = 25C on a two-layer Richtek Evaluation Board.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS4812-00 June 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
5 Page RT4812
Input Capacitor Selection
At least a 22F input capacitor is recommended to
improve transient behavior of the regulator and EMI
behavior of the total power supply circuit for LX. And
at least a 1F ceramic capacitor placed as close as
possible to the VIN and GND pins of the IC is
recommended.
Output Discharge Function
With the EN pin set to low, the VOUT pin is internally
connected to GND by an internal discharge
N-MOSFET switch.
This feature prevents residual charge voltages on
capacitor connected to VOUT pins, which may impact
proper power up of the system.
Output Capacitor Selection
At least 47F x 2 capacitors is recommended to
improve VOUT ripple.
Output voltage ripple is inversely proportional to
COUT.
Output capacitor is selected according to output ripple
which is calculated as :
VRIPPLE(PP)
tON
ILOAD
COUT
and
tON
tSW
D
tSW
1
VIN
VOUT
therefore :
COUT
tSW
1
VIN
VOUT
ILOAD
VRIPPLE(PP)
and
tSW
1
fSW
The maximum VRIPPLE occurs when VIN is at
minimum and ILOAD is at maximum.
Current Limit
RT4812 employs a valley-current limit detection
scheme to sense inductor current during the off-time.
When the loading current is increased such that the
loading is above the valley current limit threshold, the
off-time is increased until the current is decreased to
valley-current threshold. Next on-time begins after
current is decreased to valley-current threshold.
On-time is decided by (VOUT VIN) / VOUT ratio. The
output voltage decreases when further loading
current increase. The current limit function is
implemented by the scheme, refer to Figure 4.
IIN (DC)
f Valley Current Limit
Inductor Current
IL
IL
=
VIN D
Lf
IIN (DC)
Figure 4. Inductor Currents In Current Limit Operation
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS4812-00 June 2015
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet RT4812.PDF ] |
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