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ACE25C200G の電気的特性と機能

ACE25C200GのメーカーはACE Technologyです、この部品の機能は「2M BIT SPI NOR FLASH」です。


製品の詳細 ( Datasheet PDF )

部品番号 ACE25C200G
部品説明 2M BIT SPI NOR FLASH
メーカ ACE Technology
ロゴ ACE Technology ロゴ 




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ACE25C200G Datasheet, ACE25C200G PDF,ピン配置, 機能
ACE25C200G
2M BIT SPI NOR FLASH
Description
The ACE25C200G is 2M-bit Serial Peripheral Interface(SPI) Flash memory, and supports the
Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (/WP), and I/O3 (/HOLD).
The Dual I/O data is transferred with speed of 216Mbits/s and the Quad I/O & Quad output data is
transferred with speed of 432Mbits/s. The device uses a single low voltage power
supply, ranging from 2.7 Volt to 3.6 Volt.
Additionally, the device supports JEDEC standard manufacturer and device ID and three
256-bytes Security Registers..
Features
Serial Peripheral Interface (SPI)
- Standard SPI: SCLK, /CS, SI, SO, /WP, /HOLD
- Dual SPI: SCLK, /CS, IO0, IO1, /WP, /HOLD
- Quad SPI: SCLK, /CS, IO0, IO1, IO2, IO3
Read
- Normal Read (Serial): 50MHz clock rate
- Fast Read (Serial): 108MHz clock rate
- Dual/Quad (Multi-I/O) Read: 108MHz clock rate
Program
- Serial-input Page Program up to 256bytes
-Program Suspend and Resume
Erase
- Block erase (64/32 KB)
- Sector erase (4 KB)
- Chip erase
- Erase Suspend and Resume
Program/Erase Speed
- Page Program time: 0.7ms typical
- Sector Erase time: 60ms typical
- Block Erase time: 0.3/0.5s typical
- Chip Erase time: 2s typical
Flexible Architecture
-Sector of 4K-byte
-Block of 32/64K-byte
Low Power Consumption
- 20mA maximum active current
- 5uA maximum power down current
VER 1.1 1

1 Page





ACE25C200G pdf, ピン配列
ACE25C200G
2M BIT SPI NOR FLASH
Signal Description
During all operations, VCC must be held stable and within the specified valid range: VCC(min) to
VCC(max).
All of the input and output signals must be held High or Low (according to voltages of VIH, VOH, VIL or
VOL, see Section Table17 DC Electrical Characteristics on page 41). These signals are
Signal Names
Table 1
Pin No Pin Name
1 /CS
2 SO (IO1)
3 /WP (IO2)
4 VSS
5 SI (IO0)
6 SCLK
I/O Description
I Chip Select
Serial Output for single bit data Instructions. IO1 for Dual or Quad
I/O
Instructions.
Write Protect in single bit or Dual data Instructions. IO2 in Quad mode.
I/O The signal has an internal pull-up resistor and may be left unconnected in
the host system if not used for Quad Instructions.
Ground
I/O Serial Input for single bit data Instructions. IO0 for Dual or Quad
Instructions.
I Serial Clock
Hold (pause) serial transfer in single bit or Dual data Instructions. IO3 in
7 /HOLD# (IO3) I/O Quad-I/O mode. The signal has an internal pull-up resistor and may be
left unconnected in the host system if not used for Quad Instructions.
8 VCC
Core and/ O Power Supply
Ordering information
ACE25C200G XX + X H
Halogen-free
U: Tube
T: Tape and Reel
Pb - free
DP: DIP-8
FM: SOP-8 (150mil)
TM: TSSOP-8
VER 1.1 3


3Pages


ACE25C200G 電子部品, 半導体
Uniform Block Sector Architecture
Table 2 ACE25C200G Block/Sector Addresses
Memory
Density
Block(64kbyte) Block(32kbyte)
Block 0
Half block 0
Half block 1
2M Kbit
Block1
Block 2
Half block 2
Half block 3
Half block 4
Half block 5
Block 3
Half block 6
Half block 7
Sector No.
Sector 0
Sector 7
Sector 8
Sector 15
Sector 16
Sector 23
Sector 24
Sector 31
Sector 32
Sector 39
Sector 40
Sector 47
Sector 48
Sector 55
Sector 56
Sector 63
Notes:
1. Block = Uniform Block, and the size is 64K bytes.
2. Half block = Half Uniform Block, and the size is 32k bytes.
3. Sector = Uniform Sector, and the size is 4K bytes.
ACE25C200G
2M BIT SPI NOR FLASH
Sector
Size(KB)
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
Address range
000000h-000FFFh
007000h-007FFFh
008000h-008FFFh
00F000h-00FFFFh
010000h-010FFFh
017000h-017FFFh
018000h-018FFFh
01F000h-01FFFFh
020000h-020FFFh
027000h-027FFFh
028000h-028FFFh
02F000h-02FFFFh
030000h-030FFFh
037000h-037FFFh
038000h-038FFFh
03F000h-03FFFFh
VER 1.1 6

6 Page



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部品番号部品説明メーカ
ACE25C200G

2M BIT SPI NOR FLASH

ACE Technology
ACE Technology


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