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STU17L01のメーカーはSamHop Microelectronicsです、この部品の機能は「P-Channel Logic Level Enhancement Mode Field Effect Transistor」です。 |
部品番号 | STU17L01 |
| |
部品説明 | P-Channel Logic Level Enhancement Mode Field Effect Transistor | ||
メーカ | SamHop Microelectronics | ||
ロゴ | |||
このページの下部にプレビューとSTU17L01ダウンロード(pdfファイル)リンクがあります。 Total 8 pages
STU/D17L01Green
Product
Sa mHop Microelectronics C orp.
P-Channel Logic Level Enhancement Mode Field Effect Transistor
Ver 1.0
PRODUCT SUMMARY
VDSS
ID RDS(ON) (mΩ) Max
-100V
-17A
81 @ VGS=10V
94 @ VGS=4.5V
FEATURES
Super high dense cell design for low RDS(ON).
Rugged and reliable.
Suface Mount Package.
G
S
STU SERIES
TO - 252AA( D- PAK )
G
DS
STD SERIES
TO - 251( I - PAK )
ABSOLUTE MAXIMUM RATINGS (TA=25°C unless otherwise noted)
Symbol Parameter
VDS Drain-Source Voltage
VGS Gate-Source Voltage
ID Drain Current-Continuous a
TC=25°C
TC=70°C
IDM -Pulsed b
EAS Sigle Pulse Avalanche Energy d
PD
Maximum Power Dissipation a
TC=25°C
TC=70°C
TJ, TSTG
Operating Junction and Storage
Temperature Range
THERMAL CHARACTERISTICS
R JC
Thermal Resistance, Junction-to-Case a
R JA
Thermal Resistance, Junction-to-Ambient a
Limit
-100
±20
-17
-13.6
-51
110
42
27
-55 to 150
3
50
Units
V
V
A
A
A
mJ
W
W
°C
°C/W
°C/W
Details are subject to change without notice.
1
Feb,02,2010
www.samhop.com.tw
1 Page STU/D17L01
60
50
V GS =-10V
V GS =-4V
40
V GS =-3.5V
30
20
V GS =-3V
10
0
0 1 2 3 456
-VDS, Drain-to-Source Voltage(V)
Figure 1. Output Characteristics
Ver 1.0
10
8
6
T j=125 C
4
-55 C
25 C
2
0
0 0.7 1.4 2.1 2.8 3.5 4.2
-VGS, Gate-to-Source Voltage(V)
Figure 2. Transfer Characteristics
180
150
120
90 V GS =4.5V
60 V GS =10V
30
0
1 12 24 36 48 60
-ID, Drain Current(A)
Figure 3. On-Resistance vs. Drain Current
and Gate Voltage
1.8
1.6
V G S =-10V
1.4 ID=-8.5A
1.2
1.0
0.8
0
25 50 75 100 125 150
T j( C )
Tj, Junction Temperature(°C )
Figure 4. On-Resistance Variation with Drain
Current and Temperature
1.3
1.2
V DS =V G S
ID=-250uA
1.1
1.0
0.9
0.8
0.7
0.6
-50 -25 0 25 50 75 100 125 150
Tj, Junction Temperature(°C )
Figure 5. Gate Threshold Variation
with Temperature
1.15
1.10 ID=-250uA
1.05
1.00
0.95
0.90
0.85
-50 -25 0 25 50 75 100 125 150
Tj, Junction Temperature(°C )
Figure 6. Breakdown Voltage Variation
with Temperature
Feb,02,2010
3 www.samhop.com.tw
3Pages STU/D17L01
PACKAGE OUTLINE DIMENSIONS
TO-251
E
E2
L
D1
E1 D2
D
12 3
H
B2 L2 L1
B1
A
C
Ver 1.0
D3
PB
SYMBOL
A
A1
B
B1
B2
C
D
D1
D2
D3
H
E
E1
E2
L
L1
L2
P
MILLIMETERS
MIN MAX
2.100
2.500
0.350
0.650
0.400
0.800
0.650
1.050
0.500
0.900
0.400
0.600
5.300
5.700
4.900
5.300
6.700
7.300
7.000
8.000
13.700
15.300
6.300
6.700
4.600
4.900
4.800
5.200
1.300
1.700
1.400
1.800
0.500
0.900
2.300 BSC
6
A1
INCHES
MIN MAX
0.083
0.098
0.014
0.026
0.016
0.031
0.026
0.041
0.020
0.035
0.016
0.024
0.209
0.224
0.193
0.209
0.264
0.287
0.276
0.315
0.539
0.602
0.248
0.264
0.181
0.193
0.189
0.205
0.051
0.067
0.055
0.071
0.020
0.035
0.091 BSC
Feb,02,2010
www.samhop.com.tw
6 Page | |||
ページ | 合計 : 8 ページ | ||
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PDF ダウンロード | [ STU17L01 データシート.PDF ] |
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部品番号 | 部品説明 | メーカ |
STU17L01 | P-Channel Logic Level Enhancement Mode Field Effect Transistor | SamHop Microelectronics |