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74LVC126A の電気的特性と機能

74LVC126AのメーカーはON Semiconductorです、この部品の機能は「Low-Voltage CMOS Quad Buffer」です。


製品の詳細 ( Datasheet PDF )

部品番号 74LVC126A
部品説明 Low-Voltage CMOS Quad Buffer
メーカ ON Semiconductor
ロゴ ON Semiconductor ロゴ 




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74LVC126A Datasheet, 74LVC126A PDF,ピン配置, 機能
74LVC126A
Low-Voltage CMOS
Quad Buffer
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74LVC126A is a high performance, non−inverting quad buffer
operating from a 1.2 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5 V allows 74LVC126A inputs to be safely driven
from 5.0 V devices. The 74LVC126A is suitable for memory address
driving and all TTL level bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a
HIGH Z condition.
Features
Designed for 1.2 to 3.6 V VCC Operation
5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
24 mA Output Sink and Source Capability
Near Zero Static Supply Current in all Three Logic States (10 mA)
Substantially Reduces System Power Requirements
ESD Performance: Human Body Model >2000 V
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
LVC126AG
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
LVC
126A
ALYWG
G
1
A
L, WL
Y, YY
W, WW
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
October, 2015 − Rev. 0
1
Publication Order Number:
74LVC126A/D

1 Page





74LVC126A pdf, ピン配列
74LVC126A
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
VCC DC Supply Voltage
VI DC Input Voltage
VO DC Output Voltage
−0.5 to +6.5
−0.5 VI +6.5
−0.5 VO +6.5
−0.5 VO VCC + 0.5
Output in 3−State
Output in HIGH or LOW State
(Note 1)
V
V
V
V
IIK DC Input Diode Current
IOK DC Output Diode Current
IO
ICC
IGND
TSTG
TL
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for
10 Seconds
−50
−50
+50
±50
±100
±100
−65 to +150
TL = 260
VI < GND
VO < GND
VO > VCC
mA
mA
mA
mA
mA
mA
°C
°C
TJ Junction Temperature Under Bias
qJA Thermal Resistance (Note 2)
TJ = 135
SOIC = 85
TSSOP = 100
°C
°C/W
MSL
Moisture Sensitivity
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Typ Max Units
VCC Supply Voltage
Operating
Functional
V
1.65 3.6
1.2 3.6
VI Input Voltage
VO Output Voltage
HIGH or LOW State
3−State
0 5.5 V
V
0 VCC
0 5.5
IOH HIGH Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
mA
−24
−12
IOL LOW Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
mA
24
12
TA Operating Free−Air Temperature
−40
+125
°C
Dt/DV
Input Transition Rise or Fall Rate
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 3.6 V
ns/V
0 20
0 10
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
www.onsemi.com
3


3Pages


74LVC126A 電子部品, 半導体
74LVC126A
Dn Vmi
tPLH
On
Vmo
Vmi
tPHL
Vmo
VCC
0V
VOH
VOL
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
OEn Vmi
tPZL tPLZ
On Vmo
tPZH tPHZ
On Vmo
VCC
GND
HIGH
IMPEDANCE
VOL + 0.3V
VOH - 0.3V
HIGH
IMPEDANCE
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 3. AC Waveforms
Symbol
Vmi
Vmo
VHZ
VLZ
3.3 V ± 0.3 V
1.5 V
1.5 V
VOL + 0.3 V
VOH − 0.3 V
VCC
2.7 V
1.5 V
1.5 V
VOL + 0.3 V
VOH − 0.3 V
VCC < 2.7 V
VCC/2
VCC/2
VOL + 0.15 V
VOH − 015 V
www.onsemi.com
6

6 Page



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共有リンク

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