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PDF ESD8504G Data sheet ( Hoja de datos )

Número de pieza ESD8504G
Descripción ESD Protection Diode
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ESD8504G
ESD Protection Diode
Low Capacitance Array for High Speed
Data Lines
The ESD8504G is designed to protect high speed data lines from
ESD. Ultra−low capacitance and low ESD clamping voltage make this
device an ideal solution for protecting voltage sensitive high speed
data lines. The flow−through style package allows for easy PCB layout
and matched trace lengths necessary to maintain consistent impedance
between high speed differential lines such as USB 3.0/3.1.
Features
Low Capacitance (0.5 pF Max, I/O to GND)
Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
Low ESD Clamping Voltage
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
USB 3.0/3.1
eSATA
DisplayPort
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ −55 to +125 °C
Storage Temperature Range
Tstg − 55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
TL 260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ESD
ESD
±25 kV
±25 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
www.onsemi.com
UDFN10
CASE 517BB
MARKING
DIAGRAM
4GMG
G
4G = Specific Device Code (tbd)
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONFIGURATION
AND SCHEMATIC
N/C N/C GND N/C N/C
10 9 8 7 6
12 3 4 5
I/O I/O GND I/O I/O
I/O I/O I/O I/O
Pin 1 Pin 2 Pin 4 Pin 5
Pins 3, 8
Note: Common GND − Only Minimum of 1 GND connection required
See Application Note AND8308/D for further description of
survivability specs.
© Semiconductor Components Industries, LLC, 2015
October, 2015 − Rev. 0
1
ORDERING INFORMATION
Device
Package
Shipping
ESD8504GMUTAG UDFN10 3000 / Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
ESD8504G/D

1 page




ESD8504G pdf
ESD8504G
TBD
TBD
VR, VOLTAGE (V)
Figure 9. Junction Capacitance; VR = 3.5 V −
0 V, f = 1 MHz, I/O − GND, dV/dt = 214 mV/s
Figure 10. Junction Capacitance; VR = 0 V,
f = 500 MHz − 10 GHz
Without ESD8504G
With ESD8504G
Figure 11. USB3.0 Eye Diagram with and without ESD8504G. 5 Gb/s
See application note AND9075/D for further description of eye diagram testing methodology.
www.onsemi.com
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