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ESD8116 の電気的特性と機能

ESD8116のメーカーはON Semiconductorです、この部品の機能は「ESD Protection Diode」です。


製品の詳細 ( Datasheet PDF )

部品番号 ESD8116
部品説明 ESD Protection Diode
メーカ ON Semiconductor
ロゴ ON Semiconductor ロゴ 




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ESD8116 Datasheet, ESD8116 PDF,ピン配置, 機能
ESD8116
ESD Protection Diode
Low Capacitance Array for High Speed
Data Lines
The ESD8116 transient voltage suppressor is specifically designed
to protect USB 3.0/3.1 interfaces from ESD. Ultra−low capacitance
and low ESD clamping voltage make this device an ideal solution for
protecting voltage sensitive high speed data lines. The flow−through
style package allows for easy PCB layout and matched trace lengths
necessary to maintain consistent impedance between high speed
differential lines.
Features
Low Capacitance (0.35 pF Max, I/O to GND)
Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
Low ESD Clamping Voltage
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
USB 3.0/3.1
Display Port
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ −55 to +125 °C
Storage Temperature Range
Tstg − 55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
TL 260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ESD
ESD
±15 kV
±15 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
www.onsemi.com
UDFN8
CASE 517CX
MARKING
DIAGRAM
6CMG
G
6C = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONFIGURATION
I/O I/O I/O I/O
8 76 5
12
I/O GND
34
GND I/O
ORDERING INFORMATION
Device
Package
Shipping
ESD8116MUTAG UDFN8 3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
See Application Note AND8308/D for further description of
survivability specs.
© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 0
1
Publication Order Number:
ESD8116/D

1 Page





ESD8116 pdf, ピン配列
ESD8116
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol
Parameter
IPP Maximum Peak Pulse Current
VC Clamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IR Maximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
IT Test Current
RDYN
Dynamic Resistance
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
I
IPP
RDYN
VCL VBR VRWM
IIRT
VCL
RDYN
IPP
Uni−Directional TVS
V
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter
Symbol
Conditions
Min Typ Max Unit
Reverse Working Voltage
Breakdown Voltage
Reverse Leakage Current
Clamping Voltage
(Note 1)
VRWM
VBR
IR
VC
I/O Pin to GND
IT = 1 mA, I/O Pin to GND
VRWM = 3.3 V, I/O Pin to GND
IEC61000−4−2, ±8 kV Contact
3.3
4.0 5.0
1.0
See Figures 2 and 3
V
V
mA
V
Clamping Voltage
TLP (Note 2)
See Figures 6 through 9
VC IPP = 8 A
IPP = −8 A
IPP = 16 A
IPP = −16 A
IEC 61000−4−2 Level 2 equivalent
(±4 kV Contact, ±4 kV Air)
IEC 61000−4−2 Level 4 equivalent
(±8 kV Contact, ±15 kV Air)
8.5 V
−4.5
11.4
−8.0
Dynamic Resistance
RDYN I/O Pin to GND
GND to I/O Pin
0.36 W
0.44
Junction Capacitance
CJ VR = 0 V, f = 1 MHz between I/O Pins and GND
VR = 0 V, f = 1 MHz between I/O Pins
VR = 0 V, f = 1 MHz, TA = 65°C between I/O Pins and GND
0.30 0.35 pF
0.15 0.20
0.37 0.47
1. For test procedure see Figures 4 and 5 and application note AND8307/D.
2. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
90
80
70
60
50
40
30
20
10
0
−10
−20
0 20 40 60 80 100 120 140
TIME (ns)
Figure 2. IEC61000−4−2 +8 kV Contact
Clamping Voltage
10
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−20
0 20 40 60 80 100 120
TIME (ns)
Figure 3. IEC61000−4−2 −8 kV Contact
Clamping Voltage
140
www.onsemi.com
3


3Pages


ESD8116 電子部品, 半導体
ESD8116
Without ESD8116
With ESD8116
Figure 10. USB 3.0 Eye Diagram with and without ESD8116. 5 Gb/s
Without ESD8116
With ESD8116
Figure 11. USB 3.1 Eye Diagram with and without ESD8116. 10 Gb/s
See application note AND9075/D for further description of eye diagram testing methodology.
Figure 12. RF Insertion Loss
TABLE 1. RF Insertion Loss: Application Description
Interface
Data Rate
(Gb/s)
Fundamental Frequency
(GHz)
USB 3.0
5.0
2.5 (m1)
3rd Harmonic Frequency
(GHz)
7.5 (m3)
USB 3.1
10
5.0 (m2)
15 (m4)
ESD8116 Insertion Loss
(dB)
m1 = 0.128
m2 = 0.155
m3 = 0.352
m4 = 4.194
www.onsemi.com
6

6 Page



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共有リンク

Link :


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