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Datasheet LV8702V PDF ( 特性, スペック, ピン接続図 )

部品番号 LV8702V
部品説明 PWM Current Control High-efficient Stepper Motor Driver
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LV8702V Datasheet, LV8702V PDF,ピン配置, 機能
LV8702V
Bi-CDMOS LSI
PWM Current Control High-efficient
Stepper Motor Driver
www.onsemi.com
Overview
The LV8702V is a 2-channel Full-bridge driver IC that can drive a stepper
motor driver, which is capable of micro-step drive and supports quarter
step. Current is controlled according to motor load and rotational speed at
half step, half step full-torque and quarter step excitation, thereby highly
efficient drive is realized. Consequently, the reduction of power
consumption, heat generation, vibration and noise is achieved.
Feature
Built-in 1ch PWM current control stepper motor driver (bipolar type)
SSOP44J (275mil)
Ron (High-side Ron: 0.3, Low-side Ron: 0.25, total: 0.55, Ta = 25ºC, IO = 2.5A)
Micro-step mode is configurable as follows: full step/half step full-torque/half step/quarter step
Excitation step moves forward only with step signal input
Built-in output short protection circuit (latch method)
Control power supply is unnecessary
Built-in high-efficient drive function (supports half step full-torque/half step/quarter step excitation mode)
Built-in step-out detection function (Step-out detection may not be accurate during high speed rotation)
BiCDMOS process IC
IO max=2.5A
Built-in thermal shut down circuit
Typical Applications
Printer
Scanner
Surveillance camera (CCTV)
Textile machine
ORDERING INFORMATION
See detailed ordering and shipping information on page 27 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
December 2014 - Rev. 2
1
Publication Order Number :
LV8702V/D

1 Page



LV8702V pdf, ピン配列
Continued from preceding page.
Parameter
Current
selection
reference
voltage level
quarter step
half step
half step
(full-torque)
full step
Chopping frequency
CHOP pin charge/discharge
current
Chopping oscillator circuit
threshold voltage
VREF pin input current
DST1, DST2, MONI,
SST pin saturation voltage
Charge pump
VG output voltage
Rise time
Oscillator frequency
LV8702V
Symbol
Conditions
Vtdac0_W
Vtdac1_W
Vtdac2_W
Vtdac3_W
Vtdac0_H
Vtdac2_H
Vtdac0_HF
Vtdac2’_HF
Vtdac2’_F
Fchop
Ichop
Step0 (initial status, 1ch comparator level)
Step1 (initial + 1)
Step2 (initial + 2)
Step3 (initial + 3)
Step0 (initial status, 1ch comparator level)
Step2 (initial + 1)
Step0 (initial status, 1ch comparator level)
Step2’ (initial + 1)
Step2’ (initial status, 1ch comparator level)
Cchop = 200pF
Vtup
Vtdown
Iref
VREF = 1.5V
Idst1 = Idst2 = Imoni = Isst = 1mA
VG
tONG
Fosc
VG = 0.1F , Between CP1-CP2 0.1uF
ST=”H” VG=VM+4V
min
290
264
199
106
290
199
290
290
290
35
7
Ratings
typ
300
276
210
114
300
210
300
300
300
50
10
0.8
0.4
0.5
1
0.5
max
310
288
221
122
310
221
310
310
310
65
13
1.2
0.6
400
Unit
mV
mV
mV
mV
mV
mV
mV
mV
mV
kHz
A
V
V
A
mV
28
28.7
29.8
V
0.5 mS
90 125 160 kHz
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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3


3Pages


LV8702V 電子部品, 半導体
LV8702V
Substrate specifications (Substrate recommended for operation of LV8702V)
Size : 90mm × 90mm × 1.6mm (Four-layer substrate)
Material
: Glass epoxy
Copper wiring density : L1 = 85%, L2 = 90%
L1: Copper wiring pattern diagram
L2: Copper wiring pattern diagram
L3: GND layer
L4: Power supply layer
Cautions
1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more of the
Exposed Die-Pad is wet.
2) For the set design, employ the derating design with sufficient margin.
Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stress such as
vibration, impact, and tension.
Accordingly, the design must ensure these stresses to be as low or small as possible.
The guideline for ordinary derating is shown below:
(1)Maximum value 80% or less for the voltage rating
(2)Maximum value 80% or less for the current rating
(However this does not apply to high efficiency drive because operating current is lower than the setting current.)
(3)Maximum value 80% or less for the temperature rating
3) After the set design, be sure to verify the design with the actual product.
Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc.
Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction,
possibly resulting in thermal destruction of IC.
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