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PDF GS7105 Data sheet ( Hoja de datos )
| Número de pieza | GS7105 | |
| Descripción | 2A Ultra Low Dropout Linear Regulator | |
| Fabricantes | GStek | |
| Logotipo |  |
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2A Ultra Low Dropout Linear Regulator
GS7105
Features
Maximum 2A Low-Dropout Voltage Regulator
Ultra Low Dropout Voltage
Typically 220mV at 2A Output Current
High Output Accuracy over Line, Load and
Temperature
Build-In Soft-Start
Excellent startup under load from 0 to 2A
Power-On-Reset Monitoring on Both VDD and
VIN Pins
Power-OK Output function
Foldback over Current Protection and
Thermal shutdown
0.1μA (typ) Shutdown Supply Current
Low ESR Output Capacitor(Multi-layer Chip
Capacitors (MLCC)) Applicable
Vout Pull Low Resistance when Disable
PSOP-8, TDFN10-3x3
Green Product (RoHS, Lead-Free,
Halogen-Free Compliant)
Applications
Notebook PC Applications
Motherboard Applications
Low Voltage Logic Supplies
Microprocessor and Chipset Supplies
Graphic Cards
Cordless phones
General Description
The GS7105 can deliver up to 2A of continuous
output current with a typical dropout voltage of
only 220mV using internal n-channel MOSFETs.
The linear regulator uses a separate VDD supply
to power the control circuitry and drive the Inter-
nal n-channel MOSFETs. The output voltage is
adjustable from 0.8V to the voltage that is very
close to VIN.
The GS7105 allows the use of low-ESR ceramic
capacitor as low as 10uF. Moreover the IC
provide good performance on both line transient
response and load transient response.
The GS7105 provides foldback over current limit
and thermal shutdown to prevent the linear
regulator from damage. Built-in soft-start
minimizes stress on the input power source by
reducing capacitive inrush current on start-up.
During start-up, POK remain low until the output
reaches 92% of its rating value.
The GS7105 is available in PSOP-8 package or
TDFN10- 3x3 package.
This document is GStek's confidential information. Anyone having confidential obligation to GStek shall keep this document confidential. Any unauthorized
disclosure or use beyond authorized purpose will be considered as violation of confidentiality and criminal and civil liability will be asserted.
Green Solution Technology Co.,LTD.
Rev.:1.5
1
Nov-14
1 page  
2A Ultra Low Dropout Linear Regulator
GS7105
Electrical Characteristics
(VIN= VOUT+0.5V, VEN=VDD=5V, CIN=COUT=10uF, TA=TJ=25°C)
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Supply Voltage Section
VDD Operation Voltage
Range
VIN Operation Voltage
Range
VDD
VIN
Quiescent current
IQ
VDD Input current
Control Input Current
in Shutdown
VDD POR Threshold
VDD POR Hysteresis
VIN POR Threshold
VIN POR Hysteresis
IVDD
IVDD_SD
VDDRTH
VINRTH
VDD Input Range, VOUT=VREF
VIN Input Range, VOUT=VREF
VDD=VIN=VEN=5V,IOUT=0A,
VOUT=VREF
VDD=VIN=VEN=5V, IOUT=0A,
VOUT=VREF
VDD=VIN=5.0V, IOUT=0A,
VEN=0V
Output Voltage
Reference Voltage
Output Voltage
Accuracy
Line Regulation (VDD)
Line Regulation (VIN)
Load Regulation
(Note 5)
VOUT Pull Low
Resistance
Dropout Voltage
Dropout Voltage
(Note 6)
VREF
IOUT=1mA, VOUT=VREF
△ VLINE_VDD
△ VLINE_IN
△ VLOAD
VDD=4V to 5V, IOUT=1mA,
VOUT=VREF, VIN=2V
VIN=1.2V to 5V, IOUT=1mA,
VOUT=VREF
IOUT=1mA to 3 A, VOUT=VREF
VDD=VIN=5.0V, VEN=0V
VDROP
VOUT=VREF, IOUT=1A
VOUT= VREF, IOUT=2A
Protection
Current Limit
Short Circuit Current
Thermal Shutdown
Temperature
ILIM
IFOLDBACK
TSD
VDD=VIN=VEN=5V, VOUT= VREF
VOUT<0.2V
TJ Rising
3.0 5.5
1.0
Min{5.2
,VDD}
1.0 1.5
1.0 1.5
0.1 2
2.4 2.7
3
0.15 0.2
0.55 0.75 0.95
0.13 0.20
0.784 0.8 0.816
-2.0 +2.0
0.03 0.2
0.01 0.1
0.1 1.5
130
110 210
220 320
3.5
100
160
V
V
mA
mA
uA
V
V
V
V
V
%
%
%
%
Ω
mV
mV
A
mA
°C
Green Solution Technology Co.,LTD.
Rev.:1.5
5
Nov-14
5 Page 
2A Ultra Low Dropout Linear Regulator
GS7105
Feedback Network
Figure 3 shows the feedback network. The
suggested design procedure is to choose
R2=10KΩ and then calculate R2 using the
following formula: R1=(VOUT /VREF -1)*R2.
Vout
GS7105
FB
R1
R2
Vout
Coption
Cout
Figure 3. Feedback Network
COPTION can improve transient response, and
recommend value as follow:
VOUT
0.8V ~ 1.6V
1.6V ~ 2.4V
2.4V ~ 3.6V
R1
0 ~ 10 KΩ
10 KΩ ~ 20 KΩ
20 KΩ ~ 30 KΩ
COPTION
470pF~1nF
100pF~500pF
20pF~300pF
Table 2 R1 vs. COPTION
Input Capacitor selection
Bypass VIN to ground with a 10uF or greater
capacitor. Bypass VDD to ground with a 1uF
capacitor for normal operation in most appli-
cations. Ceramic, tantalum or aluminum elec-
trolytic capacitors may be selected for input
capacitor. However ceramic capacitors are
recommended due to their significant cost and
space savings. Place the capacitors physically as
close as possible to the device with wide and
direct PCB traces.
Power Dissipation and Layout Considerations
Although internal thermal limiting function is
integrated in GS7105, continuously keeping the
junction near the thermal shutdown temperature
may possibly affect device reliability. For
continuous operation, it is highly recommended to
keep the junction temperature below the
maximum operation junction temperature 125°C
for maximum reliability.
The power dissipation definition in device is:
PD = (VIN − VOUT) x IOUT + VDD x IQ
The maximum power dissipation can be
calculated as:
PD(MAX) = ( TJ(MAX) − TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient
temperature and the θJA is the junction to ambient
thermal resistance.
The thermal resistance θJA for PSOP-8 package
is 75°C/W on the standard JEDEC 51-7 (4 layers,
2S2P) thermal test board. The copper thickness
is 2oz. The maximum power dissipation at TA =
25°C can be calculated by following formula:
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.33W
(SOP-8 Exposed Pad on the minimum layout)
The thermal resistance θJA for TDFN10-3x3
package is 60°C/W on the standard JEDEC 51-7
(4 layers, 2S2P) thermal test board. The
maximum power dissipation at TA = 25°C can be
calculated by following formula:
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.67W
The thermal resistance θJA of PSOP-8 is
determined by the package design and the PCB
design. Copper plane under the exposed pad is
an effective heat sink and is useful for improving
thermal conductivity. As shown in Figure 3, the
amount of copper area to which the PSOP-8 is
mounted affects thermal performance. When
mounted to the standard PSOP-8 pad (Figure
3.a), θJA is 75°C/W. Adding copper area of pad
under the PSOP-8 Figure 3.b) reduces the θJA to
54°C/W. Even further, increasing the copper area
Green Solution Technology Co.,LTD.
Rev.:1.5
11
Nov-14
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet GS7105.PDF ] | |
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