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GL3321G の電気的特性と機能

GL3321GのメーカーはGenesysです、この部品の機能は「USB 3.0 to SATA 6Gb/s Bridge Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 GL3321G
部品説明 USB 3.0 to SATA 6Gb/s Bridge Controller
メーカ Genesys
ロゴ Genesys ロゴ 




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GL3321G Datasheet, GL3321G PDF,ピン配置, 機能
Genesys Logic, Inc.
GL3321G
USB 3.0 to SATA 6Gb/s
Bridge Controller
Datasheet
Revision 1.40
Feb. 21, 2013

1 Page





GL3321G pdf, ピン配列
Revision
1.00
1.01
1.10
1.20
1.30
1.40
GL3321G Datasheet
Revision History
Date
03/14/2012
03/21/2012
08/10/2012
08/17/2012
01/25/2013
02/21/2013
Description
First formal release
Modify Chapter 2 Pin assignment
Modify Block diagram
Modify Feature list
Remove windows to go feature
Remove BYP pin
Remove UASP
©2013 Genesys Logic, Inc. - All rights reserved.
GLI Confidential
Page 3


3Pages


GL3321G 電子部品, 半導体
GL3321G Datasheet
CHAPTER 1 FEATURES
USB specification compliance
Comply with Universal Serial Bus 3.0 Specification rev. 1.0 (USB 3.0)
Comply with Universal Serial Bus Specification rev. 2.0 (USB 2.0)
Comply with USB Mass Storage Class Specification rev. 1.0
Support USB Mass Storage Class Bulk-Only Transport (BOT)
Support 1 device address and up to 6 endpoints: Control (0) / Bulk Data Write Out (1) / Bulk Data
Read In (2) / Interrupt In (3) / CMD Out (4) / Status In (5)
Support 5 Gbps SuperSpeed, 480 Mbps high-speed, and 12 Mbps full-speed transfer rates
SATA specification features
Comply with Serial ATA Revision 3.0 Specification Gold Revision
Support SATA power saving, including partial and slumber modes
Support SATA Hot Plug
Support Native Command Queuing up to 32 commands
Support SATA host/device initiated power management
Support SATA BIST host/device initiated eye pattern test
Support 6.0 Gbps, 3.0 Gbps and 1.5 Gbps transfer rates
Support SATA Device Sleep function (DevSlp)
Embedded 8051 micro-controller
Embedded 64 Kbytes Mask ROM
Embedded 16 Kbytes Code SRAM for Cache and 2 Kbytes Data SRAM
Embedded internal regulators
5 V to 3.3V linear drop-out regulator for whole chip power supply
Inductor-type DC-DC for core power, input range from 2.97 V to 3.63 V
Single clock source, supporting 30 MHz
Available in 48-pin QFN (6 x 6 mm2)
Operating System support
Windows 8/Windows 7 32&64/Vista32&64/XP/2000/Me/98/98SE, Mac OS 9.X/10.X, Linux Kernel
2.4.X/2.6.X
Other Features
Support write Protect Function, Password Security (virtual CD ROM), Backup Management
Support Trim Command for SSD
Support ODD (BD, DVD, CD)
Spread Spectrum Clocking (SSC) for EMI reduction
On-chip watchdog timer for automatic error recovery
SPI interface for firmware update.
PWM interfaces for fan control and LED control (2 GPIOs).
UART interface for debugging
©2013 Genesys Logic, Inc. - All rights reserved.
GLI Confidential
Page 6

6 Page



ページ 合計 : 20 ページ
 
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[ GL3321G データシート.PDF ]


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共有リンク

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部品番号部品説明メーカ
GL3321G

USB 3.0 to SATA 6Gb/s Bridge Controller

Genesys
Genesys


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