PDF VT8601A Data sheet ( Hoja de datos )

Número de pieza	VT8601A
Descripción	Single-Chip Socket-370 PCI North Bridge
Fabricantes	Via
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No Preview Available ! VIA Technologies Delivering Value Apollo PLE133 Chipset VT8601A North Bridge Single-Chip Socket-370 PCI North Bridge with 133 / 100 / 66 MHz Front Side Bus, Integrated AGP 2D / 3D Graphics Accelerator and Advanced Memory Controller supporting PC133 / PC100 SDRAM for Desktop PC Systems Revision 1.82 October 22, 2001 VIA TECHNOLOGIES, INC. 1 page TecDhenlivoelroinggieVsa,luIne c. VT8601A Apollo PLE133 Attribute Controller Registers (AR)....................................................................................................................................................69 VGA Status / Enable Registers ...........................................................................................................................................................69 VGA Sequencer Registers (SR)..........................................................................................................................................................70 VGA RAMDAC Registers .................................................................................................................................................................70 VGA Graphics Controller Registers (GR) ..........................................................................................................................................71 VGA CRT Controller Registers (CR) ................................................................................................................................................72 VGA Extended Registers ........................................................................................................................................................73 VGA Extended Registers – Non-Indexed I/O Ports ............................................................................................................................73 VGA Extended Registers – Sequencer Indexed ..................................................................................................................................74 VGA Extended Registers – Graphics Controller Indexed ...................................................................................................................84 VGA Extended Registers – CRT Controller Indexed ..........................................................................................................................90 VGA Extended Registers – CRTC Shadow ......................................................................................................................................104 3D Graphics Engine Registers..............................................................................................................................................105 Operational Concept.........................................................................................................................................................................105 Drawing ...........................................................................................................................................................................................106 Geometry Primitives.........................................................................................................................................................................107 Synchronization................................................................................................................................................................................110 Functional Blocks.............................................................................................................................................................................110 Bus Interface ....................................................................................................................................................................................110 Span Engine............................................................................................................................................................................111 Graphics Engine Core ...........................................................................................................................................................112 Graphics Engine Organization..........................................................................................................................................................115 Setup Engine Registers.....................................................................................................................................................................116 Vertex Registers ...............................................................................................................................................................................117 Rasterization Engine Registers .........................................................................................................................................................118 Pixel Engine Registers......................................................................................................................................................................125 Texture Engine Registers..................................................................................................................................................................131 Memory Interface Registers .............................................................................................................................................................133 Data Port Area..................................................................................................................................................................................133 FUNCTIONAL DESCRIPTIONS ...................................................................................................................................................134 GRAPHICS CONTROLLER POWER MANAGEMENT ......................................................................................................................134 Power Management States....................................................................................................................................................134 Power Management Clock Control .....................................................................................................................................134 Power Management Registers ..............................................................................................................................................134 ELECTRICAL SPECIFICATIONS ...............................................................................................................................................135 ABSOLUTE MAXIMUM RATINGS ..................................................................................................................................................135 DC CHARACTERISTICS.................................................................................................................................................................135 POWER CHARACTERISTICS..........................................................................................................................................................136 AC TIMING SPECIFICATIONS.......................................................................................................................................................136 MECHANICAL SPECIFICATIONS .............................................................................................................................................137 Revision 1.82 October 22, 2001 -iii- Table of Contents 5 Page TecDhenlivoelroinggieVsa,luIne c. VT8601A Apollo PLE133 • DVD − Hardware-Assisted MPEG-2 Architecture for DVD with AC-3 − Simultaneous motion compensation and front-end processing (parsing, decryption and decode) − Supports full DVD 1.0, VCD 2.0 and CD-Karaoke − Microsoft DirectShow 3.0 native support, backward compatible to MCI − No additional frame buffer requirements − Sub-picture hardware eliminates Run-Length-Decoder and Alpha Blending overhead − Dynamic frame and field de-interlace filtering for high quality playback on VGA monitors (Bob and Weave) − Tamper-proof software CSS implementation − Freeze, Fast-Forward, Slow Motion, Reverse − Pan-and-Scan support for 16:9 sequence • Video Processor − On-chip Color Space Converter (CSC) − Anti-tearing via two frame buffer based capture surfaces − Minifier for video stream compression and filtering − Horizontal/vertical interpolation with edge recovery − Dual frame buffer apertures for independent memory access for graphics and video − YUV 4:2:2/4:1:1/4:2:0 and RGB formats − Video Module Interface (VMI) to MPEG and video decoder − Vertical Blank Interval for Intercast™ − Overlay differing video and graphic color depths − Minifier Video Module Interface (VMI) to MPEG and video decode − Display two simultaneous video streams from both internal AGP and VMI − Two scalers and Color Space Converters (CSC) for independent windows • Digital Flat Panel (DFP) Interface − 85 MHz Flat Panel Monitor interface supports 1024x768 panels − Uses external TMDS transmitters for advanced panel interfaces • Power Management Support − Dynamic power down of SDRAM (CKE) − Independent clock stop controls for CPU / SDRAM, AGP, and PCI bus − PCI and AGP bus clock run and clock generator control − VTT suspend power plane preserves memory data − Suspend-to-DRAM and Self-Refresh operation − EDO self-refresh and SDRAM self-refresh power down − 8 bytes of BIOS scratch registers − Low-leakage I/O pads • Testability − Build-in NAND-tree pin scan test capability Revision 1.82 October 22, 2001 -5- Product Features 11 Page

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