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G28F008S3-150 の電気的特性と機能

G28F008S3-150のメーカーはIntel Corporationです、この部品の機能は「BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4/ 8/ AND 16 MBIT」です。


製品の詳細 ( Datasheet PDF )

部品番号 G28F008S3-150
部品説明 BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4/ 8/ AND 16 MBIT
メーカ Intel Corporation
ロゴ Intel Corporation ロゴ 




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G28F008S3-150 Datasheet, G28F008S3-150 PDF,ピン配置, 機能
E
PRELIMINARY
BYTE-WIDE
SMART 3 FlashFile™ MEMORY FAMILY
4, 8, AND 16 MBIT
28F004S3, 28F008S3, 28F016S3
Includes Commercial and Extended Temperature Specifications
n SmartVoltage Technology
Smart 3 Flash: 2.7 V or 3.3 V VCC
and 2.7 V, 3.3 V or 12 V VPP
n High-Performance
120 ns Read Access Time
n Enhanced Data Protection Features
Absolute Protection with VPP = GND
Flexible Block Locking
Block Write Lockout during Power
Transitions
n Enhanced Automated Suspend Options
Program Suspend to Read
Block Erase Suspend to Program
Block Erase Suspend to Read
n Industry-Standard Packaging
40-Lead TSOP, 44-Lead PSOP
and 40 Bump µBGA* CSP
n High-Density 64-Kbyte Symmetrical
Erase Block Architecture
4 Mbit: Eight Blocks
8 Mbit: Sixteen Blocks
16 Mbit: Thirty-Two Blocks
n Extended Cycling Capability
100,000 Block Erase Cycles
n Low Power Management
Deep Power-Down Mode
Automatic Power Savings Mode
Decreases ICC in Static Mode
n Automated Program and Block Erase
Command User Interface
Status Register
n SRAM-Compatible Write Interface
n ETOX™ V Nonvolatile Flash
Technology
Intel’s byte-wide Smart 3 FlashFile™ memory family renders a variety of density offerings in the same
package. The 4-, 8-, and 16-Mbit byte-wide FlashFile memories provide high-density, low-cost, nonvolatile,
read/write storage solutions for a wide range of applications. Their symmetrically-blocked architecture, flexible
voltage, and extended cycling provide highly flexible components suitable for resident flash arrays, SIMMs,
and memory cards. Enhanced suspend capabilities provide an ideal solution for code or data storage
applications. For secure code storage applications, such as networking, where code is either directly
executed out of flash or downloaded to DRAM, the 4-, 8-, and 16-Mbit FlashFile memories offer three levels
of protection: absolute protection with VPP at GND, selective hardware block locking, or flexible software
block locking. These alternatives give designers ultimate control of their code security needs.
This family of products is manufactured on Intel’s 0.4 µm ETOX™ V process technology. They come in
industry-standard packages: the 40-lead TSOP, ideal for board-constrained applications, and the rugged
44-lead PSOP. Based on the 28F008SA architecture, the byte-wide Smart 3 FlashFile memory family
enables quick and easy upgrades for designs that demand state-of-the-art technology.
December 1997
Order Number: 290598-004

1 Page





G28F008S3-150 pdf, ピン配列
E
BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY
CONTENTS
PAGE
1.0 INTRODUCTION .............................................5
1.1 New Features...............................................5
1.2 Product Overview.........................................5
1.3 Pinout and Pin Description ...........................6
2.0 PRINCIPLES OF OPERATION .....................11
2.1 Data Protection ..........................................12
3.0 BUS OPERATION .........................................12
3.1 Read ..........................................................12
3.2 Output Disable ...........................................12
3.3 Standby......................................................12
3.4 Deep Power-Down .....................................12
3.5 Read Identifier Codes Operation ................13
3.6 Write ..........................................................13
4.0 COMMAND DEFINITIONS ............................13
4.1 Read Array Command................................16
4.2 Read Identifier Codes Command ...............16
4.3 Read Status Register Command................16
4.4 Clear Status Register Command................16
4.5 Block Erase Command ..............................16
4.6 Program Command....................................17
4.7 Block Erase Suspend Command................17
4.8 Program Suspend Command .....................18
4.9 Set Block and Master Lock-Bit Commands 18
4.10 Clear Block Lock-Bits Command..............19
5.0 DESIGN CONSIDERATIONS ........................27
5.1 Three-Line Output Control..........................27
5.2 RY/BY# Hardware Detection ......................27
5.3 Power Supply Decoupling ..........................27
5.4 VPP Trace on Printed Circuit Boards...........27
5.5 VCC, VPP, RP# Transitions .........................27
5.6 Power-Up/Down Protection ........................27
5.7 VPP Program and Erase Voltages on Sub-
0.4µ S3 Memory Family ............................28
PAGE
6.0 ELECTRICAL SPECIFICATIONS..................29
6.1 Absolute Maximum Ratings........................29
6.2 Commercial Temperature Operating
Conditions .................................................29
6.3 Capacitance ...............................................29
6.4 DC Characteristics— Commercial
Temperature..............................................30
6.5 AC Characteristics—Read-Only
Operations—Commercial Temperature .....34
6.6 AC Characteristics—Write Operations—
Commercial Temperature..........................36
6.7 Block Erase, Program, and Lock-Bit
Configuration Performance—Commercial
Temperature..............................................38
6.8 Extended Temperature Operating
Conditions .................................................39
6.9 DC Characteristics—Extended
Temperature..............................................39
6.10 AC Characteristics—Read-Only
Operations—Extended Temperature .........39
7.0 ORDERING INFORMATION..........................40
8.0 ADDITIONAL INFORMATION .......................40
PRELIMINARY
3


3Pages


G28F008S3-150 電子部品, 半導体
BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY
E
To protect programmed data, each block can be
locked. This block locking mechanism uses a
combination of bits, block lock-bits and a master
lock-bit, to lock and unlock individual blocks. The
block lock-bits gate block erase and program
operations, while the master lock-bit gates block
lock-bit configuration operations. Lock-bit config-
uration operations (Set Block Lock-Bit, Set Master
Lock-Bit, and Clear Block Lock-Bits commands) set
and clear lock-bits.
The status register and RY/BY# output indicate
whether or not the device is busy executing or
ready for a new command. Polling the status
register, system software retrieves WSM feedback.
The RY/BY# output gives an additional indicator of
WSM activity by providing a hardware status signal.
Like the status register, RY/BY#-low indicates that
the WSM is performing a block erase, program, or
lock-bit configuration operation. RY/BY#-high
indicates that the WSM is ready for a new
command, block erase is suspended, program is
suspended, or the device is in deep power-down
mode.
The Automatic Power Savings (APS) feature
substantially reduces active current when the
device is in static mode (addresses not switching).
In APS mode, the typical ICCR current is 3 mA.
When CE# and RP# pins are at VCC, the
component enters a CMOS standby mode. Driving
RP# to GND enables a deep power-down mode
which significantly reduces power consumption,
provides write protection, resets the device, and
clears the status register. A reset time (tPHQV) is
required from RP# switching high until outputs are
valid. Likewise, the device has a wake time (tPHEL)
from RP#-high until writes to the CUI are
recognized.
1.3 Pinout and Pin Description
The family of devices is available in 40-lead TSOP
(Thin Small Outline Package, 1.2 mm thick), 44-
lead PSOP (Plastic Small Outline Package) and 40-
bump µBGA* CSP (28F008S3 and 28F016S3 only).
Pinouts are shown in Figures 2, 3 and 4.
DQ0 - DQ 7
Output
Buffer
Input
Buffer
4-Mbit: A0 - A18 ,
8-Mbit: A0 - A19 ,
16-Mbit: A0 - A20
Input
Buffer
Address
Latch
Address
Counter
Y
Decoder
X
Decoder
Identifier
Register
Status
Register
Data
Comparator
Y Gating
4-Mbit: Eight
8-Mbit: Sixteen
16-Mbit: Thirty-Two
64-Kbyte Blocks
Command
Register
I/O Logic
VCC
CE#
WE#
OE#
RP#
Write State
Machine
Program/Erase
Voltage Switch
RY/BY#
VPP
VCC
GND
Figure 1. Block Diagram
6 PRELIMINARY

6 Page



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部品番号部品説明メーカ
G28F008S3-150

BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4/ 8/ AND 16 MBIT

Intel Corporation
Intel Corporation


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