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PDF V260H1-P03 Data sheet ( Hoja de datos )

Número de pieza V260H1-P03
Descripción TFT LCD Module
Fabricantes CHI MEI 
Logotipo CHI MEI Logotipo



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No Preview Available ! V260H1-P03 Hoja de datos, Descripción, Manual

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: 23, Jul. 2010
Model No.: V260H1 – P03
Approval
TFT LCD Approval Specification
MODEL NO.: V260H1 – P03
Customer:
Approved by:
Note:
Approved By
TV Product Marketing & Management Div
Chao-Chun Chung
Reviewed By
QA Dept.
Hsin-Nan Chen
Product Development Div.
TC Pan
LCD TV Marketing and Product Management Div.
Prepared By
Vincent Chou
Delia Lin
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V260H1-P03 pdf
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: 23, Jul. 2010
Model No.: V260H1 – P03
Approval
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT (BASED ON CMI MODULE V260H1-L03)
Item
Storage Temperature
Operating Ambient Temperature
Symbol
TST
TOP
Value
Min. Max.
-20 +60
0 +50
Unit Note
ºC (1)
ºC (1), (2)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
thermal management in final product design.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10 Storage Range
-40 -20
0 20 40
Temperature (ºC)
60 80
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V260H1-P03 arduino
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: 23, Jul. 2010
Model No.: V260H1 – P03
Approval
34 GND
Ground
35 ERX3-
36 ERX3+
Even pixel Negative LVDS differential data input. Channel 3
Even pixel Positive LVDS differential data input. Channel 3
(1)
37 N.C.
38 N.C.
No Connection
No Connection
(3)
39 GND
Ground
40 N.C.
No Connection
41 N.C.
No Connection
42 N.C.
No Connection
(3)
43 N.C.
No Connection
44 N.C.
No Connection
45 SELLVDS High(3.3V) or open for VESA, Low (GND) for JEIDA
(4)(5)
46 N.C.
No Connection
47 N.C.
No Connection
48 N.C.
49 N.C.
No Connection
No Connection
(3)
50 N.C.
No Connection
51 N.C.
No Connection
Note (1) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and
the second pixel is even pixel
Note (2) LVDS connector pin order defined as follows
Note (3) Reserved for internal use. Please leave it open.
Note (4) Low: JEIDA LVDS Format (Connect to GND), High or open: VESA Format. (Connect to +3.3V)
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