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PDF GX434CDB Data sheet ( Hoja de datos )

Número de pieza GX434CDB
Descripción GX434 Monolithic 4x1 Video Multiplexer
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! GX434CDB Hoja de datos, Descripción, Manual

FEATURES
low differential gain: 0.03% typ. at 4.43 MHz
low differential phase: 0.012 deg. typ. at 4.43 MHz
low insertion loss: 0.05 dB max at 100 kHz
low disabled power consumption: 5.2 mW typ.
high off isolation: 110 dB at 10 MHz
all hostile crosstalk @ 5 MHz, 97 dB typ.
bandwidth (-3dB) with 30 pF load, 100 MHz typ.
fast make-before-break switching: 200 ns typ.
TTL and 5 volt CMOS compatible logic inputs
low cost 14 pin DIP and16 pin SOIC packages
optimised performance for NTSC, PAL and SECAM
applications
APPLICATIONS
Glitch free analog switching for...
• High quality video routing
• A/D input multiplexing
• Sample and hold circuits
• TV/ CATV/ monitor switching
AVAILABLE PACKAGING
14 pin DIP and 16 pin SOIC (wide)
FUNCTIONAL BLOCK DIAGRAM
IN 0 X
IN 1 X
IN 2 X
IN 3 X
OUTPUT
A0
A1
2 TO 4 DECODER
LOGIC
CHIP
SELECT
CS
GX434 Monolithic 4x1
Video Multiplexer
DATA SHEET
CIRCUIT DESCRIPTION
The GX434 is a high performance low cost monolithic 4x1
video multiplexer incorporating four bipolar switches with a
common output, a 2 to 4 address decoder and fast chip select
circuitry. The chip select input allows for multi-chip paralleled
operation in routing matrix applications. The chip is selected
by applying a logic 0 on the chip select input.
Unlike devices using MOS bilateral switching elements, these
bipolar circuits represent fully buffered, unilateral transmission
paths when selected. This results in extremely high output to
input isolation. They also feature fast make-before-break
switching action. These features eliminate such problems as
switching 'glitches' and output-to-input signal feedthrough.
The GX434 operates from ± 7 to ± 13.2 volt DC supplies. They
are specifically designed for video signal switching which
requires extremely low differential phase and gain. Logic
inputs are TTL and 5 volt CMOS compatible providing address
and chip select functions. When the chip is not selected, the
output goes to a high impedance state.
PIN CONNECTIONS
TOP VIEW
IN 0 PIN 1
GND
IN 1
GND
IN 2
GND
IN 3 7
14 +8V
AO
A1
CS
O/P
NRC
EXT
8 -8V
TOP VIEW
IN 0 PIN 1
16
GND
IN 1
GND
IN 2
GND
IN 3
NC
8
9
PIN CONNECTION
14 PIN DIP
GX434
PIN CONNECTION
16 PIN SOIC
(wide)
+8V
NC
AO
A1
CS
O/P
NRCEXT
-8V
TRUTH TABLE
CS A1 A0
00 0
00 1
OUTPUT
IN 0
IN 1
01
01
0
1
IN 2
IN 3
1X X
HI - Z
X = DON'T CARE
Document No. 510 - 34 - 2
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946
Japan Branch: A-302 M i yamae Vi l l age, 2–10–42 M i yamae, Suginami–ku, Tokyo 168, Japan tel. (03) 3334-7700 fax (03) 3247-8839

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GX434CDB pdf
110
100
90
80
70
60
50
10
FREQUENCY (MHz)
100
Chip Disabled Crosstalk vs Frequency
+0.05
+0.04
+0.03
+0.02
+0.01
0
-0.01
-0.02
-0.03
-0.04
-0.05
-0.8
dg %
ƒ = 3.58 MHz
Blanking level is
clamped to VBIAS
dp °
-0.6 -0.4
-0.2 0
+0.2 +0.4 +0.6
INPUT BIAS (V)
dg/dp vs Input Bias
+0.8
+1.0
+0.8
+0.6
+0.4
+0.2
0.1
-0.2
-0.4
-0.6
-0.8
-1.0
0.1
1 10
FREQUENCY (MHz)
100
Normalized Gain Spread CL = 30pF
110
100
Analog signal
IN is 40 IRE
(286 mV p-p)
at 10 MHz
90
80
-1
0 +1 +2 +3
INPUT BIAS (V)
Chip Disabled Crosstalk vs Input Bias (V)
+0.05
+0.04
+0.03
+0.02
+0.01
0
1
dg %
Blanking level
0V DC
dp °
2 3 45
3.58
FREQUENCY (MHz)
dg/dp vs Frequency
8 10
30 M
10 M
1 M
RIN ON
100 k
RIN OFF
CIN OFF
CIN ON
4
3
2
10 k
-1
0 +1
INPUT BIAS (V)
Input Impedance
+2
1
+3
5 510 -34 -2

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