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PDF VMMK-2303 Data sheet ( Hoja de datos )

Número de pieza VMMK-2303
Descripción 0.5 to 6 GHz 1.8 V E-pHEMT Shutdown LNA
Fabricantes AVAGO 
Logotipo AVAGO Logotipo



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VMMK-2303
0.5 to 6 GHz 1.8 V E-pHEMT Shutdown LNA in Wafer Level Package
Data Sheet
Description
Avago’sVMMK-2303 is an easy-to-use GaAs MMIC amplifier
that offers excellent noise figure and flat gain from 0.5
to 6 GHz in a miniaturized wafer level package (WLP). It
operates from 1.8V CMOS supply or 3.3V battery supply.
The bias circuit has incorporated a power down feature
which is accessed from the input port.
The input and output are matched to 50 (better than 2:1
SWR) across the entire bandwidth; no external matching
is needed. This amplifier is fabricated with enhancement
E-pHEMT technology and industry leading revolutionary
wafer level package. The wafer level package is small and
ultra thin yet can be handled and placed with standard
0402 pick and place assembly.
WLP 0402, 1mm x 0.5mm x 0.25 mm
EY
Pin Connections (Top View)
Input
/ Vc
EY
Output
/ Vdd
Features
 1 x 0.5 mm Surface Mount Package
 Ultrathin (0.25mm)
 Power down function
 1.8V Supply
 50Ohm Input and Output Match
 RoHs6 + Halogen Free
Specifications (3GHz, 1.8V, 21mA Typ.)
 Noise Figure: 2.0dB typical
 Associated Gain: 14dB
 Output IP3: +22dBm
 Output P1dB: +9dBm
Applications
 Low Noise and Driver for Cellular/PCS and WCDMA
Base Stations
 2.4 GHz, 3.5GHz, 5-6GHz WLAN and WiMax notebook
computer, access point and mobile wireless
applications
 802.16 & 802.20 BWA systems
 WLL and MMDS Transceivers
 Radar, radio and ECM systems
Input
/ Vc
Amp
Note:
“E” = Device Code
“Y” = Month Code
Output
/ Vdd
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 50V
ESD Human Body Model = 125V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.

1 page




VMMK-2303 pdf
VMMK-2303 Typical Performance (continue)
(TA = 25°C, Vdd = 1.8V, Vc = 1.8V, Idd = 21mA, Zin = Zout = 50 unless noted)
30 3
2.5
20 2
1.5
10 1
0
01
Figure 7. Total Current over Vdd [1]
2
Vd (V)
3
0.5 Vd=1.8V, Vc=1.8V
Vd=3.3V, Vc=1.8V
0
4 01234567
Frequency (GHz)
Figure 8. Noise Figure over Vdd [1]
20 0
Vd=1.8V, Vc=1.8V
-5 Vd=3.3V, Vc=1.8V
15
-10
10 -15
5
Vd=1.8V, Vc=1.8V
Vd=3.3V, Vc=1.8V
0
01234567
Frequency (GHz)
-20
-25
-30
01234567
Frequency (GHz)
Figure 9. Gain over Vdd [1]
Figure 10. Isolation over Vdd [1]
0
Vd=1.8V, Vc=1.8V
Vd=3.3V, Vc=1.8V
-5
-10
-15
0
Vd=1.8V, Vc=1.8V
-5 Vd=3.3V, Vc=1.8V
-10
-15
-20
-20
01234567
Frequency (GHz)
-25
01234567
Frequency (GHz)
Figure 11. Input Return Loss Over Vdd [1]
Figure 12. Output Return Loss Over Vdd [1]
Notes:
1. Data taken on a G-S-G probe substrate fully de-embedded to the reference plane of the package
5

5 Page





VMMK-2303 arduino
Tape Dimensions
Note: 2
P2
Note: 1
Do Po
B
T
5° (Max)
A
R0.1
A
Ao
P1
5° (Max)
Scale 5:1
AA SECTION
Unit: mm
Symbol
K1
Po
P1
P2
Do
D1
E
F
10Po
W
T
Spec.
4.0±0.10
4.0±0.10
2.0±0.05
1.55±0.05
0.5±0.05
1.75±0.10
3.50±0.05
40.0±0.10
8.0±0.20
0.20±0.02
B
D1
Ko
Ao = 0.73±0.05 mm
Bo = 1.26±0.05 mm
Ko
=
0.35
+0.05
+0
mm
Notice:
1. 10 Sprocket hole pitch cumulative tolerance is ±0.1mm.
2. Pocket position relative to sprocket hole measured as true position
of pocket not pocket hole.
3. Ao & Bo measured on a place 0.3mm above the bottom of the
pocket to top surface of the carrier.
4. Ko measured from a plane on the inside bottom of the pocket to
the top surface of the carrier.
5. Carrier camber shall be not than 1m per 100mm through a length
of 250mm.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved.
AV02-2002EN - August 3, 2011

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