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GS9022-CPJ の電気的特性と機能

GS9022-CPJのメーカーはETCです、この部品の機能は「Digital Video Serializer」です。


製品の詳細 ( Datasheet PDF )

部品番号 GS9022-CPJ
部品説明 Digital Video Serializer
メーカ ETC
ロゴ ETC ロゴ 




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GS9022-CPJ Datasheet, GS9022-CPJ PDF,ピン配置, 機能
FEATURES
• built-in 75 cable driver with two serial outputs
• standard independent operation
• space saving 28 pin PLCC package
• 650 mW typical power dissipation (data output
driving 75 load).
• supports bit rates to 400 Mb/s
• accepts 8 bit and 10 bit TTL and CMOS
compatible parallel data inputs
• fully compatible with SMPTE 259M serial digital
standard
• single +5 or -5 volt supply
APPLICATIONS
• 4ƒSC, 4:2:2 and 360 Mb/s serial digital interfaces for:
Video cameras
VTRs
Signal generators
Portable equipment
GENLINXTM GS9022
Digital Video Serializer
DATA SHEET
DEVICE DESCRIPTION
The GS9022 is a monolithic bipolar integrated circuit designed
to serialize SMPTE 125M and SMPTE 244M bit parallel digital
signals as well as other 8 or 10 bit parallel formats. This device
performs the functions of sync detection, parallel to serial
conversion, data scrambling (using the X9 + X4 +1 algorithm),
10x parallel clock multiplication and conversion of NRZ to
NRZI serial data. The data rate is automatically set for SMPTE
259M data rates to 400 Mb/s. Other features include a lock
detect output and an internal cable driver capable of driving
two 75loads.
The device requires a single +5 volt or -5 volt supply and
typically consumes 650 mW of power while driving two 75
loads. The 28 pin PLCC packaging assures a small footprint
for the complete encoder function.
ORDERING INFORMATION
Part Number
Package
GS9022-CPJ
GS9022-CTJ
28 pin PLCC
28 pin PLCC Tape
Temperature
O°C to 70°C
O°C to 70°C
SYNC
DETECT
DISABLE
25
PARALLEL 3-12
DATA
IN (10 BITS)
INPUT
LATCH
SYNC
DETECT
P/S
CONVERTER
SCRAMBLER
NRZ
NRZI
RISE TIME
CONTROL
PLD
SCLK
MUX
22 SERIAL DATA
23 SERIAL DATA
PCLK 13
LOOP 17
FILTER
GS9022
PHASE
FREQUENCY
DETECT
CHARGE
PUMP
VCO
LOCK
DETECT
DIV BY 10
GENERATOR
DIV BY 2
GENERATOR
OSCILLATOR
14
LOCK
DETECT
19
RVCO
28
REGULATOR CAP
26
COSC
FUNCTIONAL BLOCK DIAGRAM
Revision Date: August 1997
Document No. 521 - 42 - 01
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946
Gennum Japan Corporation: A-302 Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168, Japan tel. (03) 3334-7700 fax (03) 3247-8839

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GS9022-CPJ pdf, ピン配列
GS9022 Digital Video Serializer - Detailed Device Description
The GS9022 Serializer is a bipolar integrated circuit used to
convert parallel data into a serial format according to the
SMPTE 259M standard. The device encodes both eight and
ten bit TTL-compatible parallel signals producing serial data
rates up to 400 Mb/s. It operates from a single five volt supply
and is packaged in a 28 pin PLCC.
Functional blocks within the device include the input latches,
sync detector, parallel to serial converter, scrambler, NRZ to
NRZI converter, internal cable driver, PLL for 10 x parallel
clock multiplication and lock detect.
The parallel data (PD0-PD9) and parallel clock (PCKIN) are
applied via pins 3 through 13 respectively.
Sync Detector
The Sync Detector looks for the reserved words 000-003 and
3FC-3FF, in ten bit hexadecimal, or 00 and FF in eight bit
hexadecimal, used in the TRS-ID sync word. When the
occurrence of either all zeros or all ones at inputs PD2-PD9 is
detected, the lower two bits PD0 and PD1 are forced to zeros
or ones, respectively. This makes the system compatible with
eight or ten bit data. For non - SMPTE standard parallel data,
a logic input, Sync Detect Disable (25) is available to disable
this feature.
Scrambler
The Scrambler is a linear feedback shift register used to
pseudo-randomize the incoming serial data according to the
fixed polynomial (X9+X4+1). This minimizes the DC component
in the output serial data stream. The NRZ to NRZI converter
uses another polynomial (X+1) to convert a long sequence of
ones to a series of transitions, minimizing polarity effects.
The charge pump delivers a 'charge packet' to the loop filter
which is proportional to the system phase error. Internal
voltage clamps are used to constrain the loop filter voltage
between approximately 1.8 and 3.4 volts.
The VCO, constructed from a current-controlled multivibrator,
features operation in excess of 400 Mb/s and a wide pull range
(≈ ± 40% of centre frequency).
VCO Centre Frequency Selection
The wide VCO pull range allows the PLL to compensate for
variations in device processing, temperature variations and
changes in power supply voltage, without external adjustment.
A single external resistor is used to set the VCO current for all
standards.
The COSC pin is used to configure the VCO of the GS9022 in
one of three modes, as shown below:
COSC
0.1µF to GND
Mode
Auto Standard
10k Resistor to VCC
ƒ/2 ON
10k Resistor to GND
ƒ/2 OFF
In auto standard mode, the capacitor sets the sweep rate at
which the VCO toggles between ƒ and ƒ/2.
The ƒ/2 ON and ƒ/2 OFF modes are used to configure the
GS9022 VCO for single standard operation.
The lock detect circuit disables the serial data output when the
loop is not locked. The Lock Detect output is available from pin
14 and is HIGH when the loop is locked.
Phase Locked Loop
The PLL performs parallel clock multiplication and provides
the timing signal for the serializer. It is composed of
a phase/frequency detector, charge pump, VCO, a
divide-by-ten counter, and a divide by two counter.
The true and complement serial data, SDO and SDO are
available from pins 22 and 23. These outputs will drive
two 75 co-axial cables with SMPTE level serial digital
video signals.
The phase/frequency detector allows a wider capture range
and faster lock time than that which can be achieved with a
phase discriminator alone. The discrimination of frequency
also eliminates harmonic locking. With this type of discriminator,
the PLL can be over-damped for good stability without
sacrificing lock time.
3 521 - 42 - 01


3Pages


GS9022-CPJ 電子部品, 半導体
TYPICAL PERFORMANCE CURVES (VS = 5V, TA = 25° C unless otherwise shown)
400
350 RVCO =2.2k
Auto Standard Mode
300
250
200
150
100
50
50
100 150 200 250 300 350 400 450
DATA RATE (Mbps)
Fig. 5 Output Jitter
810
800
790
780
770
760
0
10 20 30 40 50 60 70
AMBIENT TEMPERATURE (°C)
Fig. 6 Serial Data Output Level vs Temperature
600
550 RVCO =2.2k
500
450
ƒ/2 OFF
400
350
300
250 ƒ/2 ON
200
150
100
50
0
2.0
2.2
2.4 2.6 2.8 3.0 3.2 3.4
TYPICAL LOOP FILTER VOLTAGE (V)
Fig. 7 VCO Frequency vs Loop Filter Voltage
3.1
3.0
2.9
2.8 RVCO =2.2k
Auto Standard Mode
2.7
360 Mbps
177 Mbps
2.6
143 Mbps
2.5
2.4
270 Mbps
2.3
0 10 20 30 40 50 60 70
TEMPERATURE (°C)
Fig. 8 Loop Filter Voltage vs Temperature
521 - 42 - 01
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部品番号部品説明メーカ
GS9022-CPJ

Digital Video Serializer

ETC
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