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PDF V320HJ1-P01 Data sheet ( Hoja de datos )

Número de pieza V320HJ1-P01
Descripción TFT Liquid Crystal Display module
Fabricantes Chi Mei 
Logotipo Chi Mei Logotipo



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Global LCD Panel Exchange Center
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PRODUCT SPECIFICATION
ϭ Tentative Specification
Ϯ Preliminary Specification
ϭ Approval Specification
MODEL NO.: V320HJ1
SUFFIX: P01
(For MF grade SKD)
Customer:
APPROVED BY
SIGNATURE
Name / Title
Note
Please return 1 copy for your confirmation with your
signature and comments.
Approved By
Checked By Prepared By
Chao-Chun Chung Vincent Chou Wayne Lin
Version 1.0
1 DateΚ15 Feb. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
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V320HJ1-P01 pdf
Global LCD Panel Exchange Center
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PRODUCT SPECIFICATION
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V320HJ1-P01 is a 32” TFT Liquid Crystal Display product with driver ICs and 2ch-LVDS interface. This product
supports 1920 x 1080 Full HDTV format and can display 16.7M colors (8-bit). The backlight unit is not built in.
1.2 FEATURES
CHARACTERISTICS ITEMS
SPECIFICATIONS
Screen Diagonal [in]
32
Pixels [lines]
Active Area [mm]
Sub-Pixel Pitch [mm]
1920 ͪ 1080
698.4(H) ͪ 392.85(V)
0.12125(H) ͪ 0.36375(V)
Pixel Arrangement
RGB vertical stripe
Weight [g]
Physical Size [mm]
TYP. 1150g
712.89(W) ͪ 434.3(H) ͪ 1.79(D) Typ.
Display Mode
Transmissive mode / Normallly black
Contrast Ratio
5000:1 Typ.
(Typical value measure at CMI’s module)
Glass thickness (Array / CF) [mm] 0.7 / 0.7
Viewing Angle (CR>20)
+88/-88(H), +88/-88(V) Typ. (CRЊ20)
(Typical value measure at CMI’s module)
Color Chromaticity
R = (0.649, 0.324)
G = (0.288, 0.567)
B = (0.142, 0.077)
W= (0.319, 0.353)
Cell Transparency [%]
* Please refer to “color chromaticity” on p.23
ˇˁˈʸ
Polarizer Surface Treatment
Anti-Glare coating (Haze 11%), Hard coating (3H)
1.3 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max.
Weight
1100
1150
1200
I/F
connector
mounting
position
The mounting
screen center
inclination of the connector makes
within ̈́ 0.5mm as the horizontal.
the
Unit Note
g-
(2)
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Connector mounting position
Version 1.0
5 DateΚ15 Feb. 2011
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com

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V320HJ1-P01 arduino
Global LCD Panel Exchange Center
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PRODUCT SPECIFICATION
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD OPEN CELL INPUT
CNF1 Connector Pin Assignment
Pin Name
1 VCC
2 VCC
3 VCC
4 VCC
5 VCC
6 N.C.
7 GND
8 GND
9 GND
10 ORX0-
11 ORX0+
12 ORX1-
13 ORX1+
14 ORX2-
15 ORX2+
16 GND
17 OCLK-
18 OCLK+
19 GND
20 ORX3-
21 ORX3+
22 N.C.
23 N.C.
24 GND
25 ERX0-
26 ERX0+
27 ERX1-
28 ERX1+
29 ERX2-
30 ERX2+
31 GND
32 ECLK-
33 ECLK+
34 GND
35 ERX3-
36 ERX3+
37 N.C.
38 N.C.
39 GND
40 SCL
41 SDA
42 N.C.
43 WP
Description
+12V power supply
+12V power supply
+12V power supply
+12V power supply
+12V power supply
No Connection
Ground
Ground
Ground
Odd pixel Negative LVDS differential data input. Channel 0
Odd pixel Positive LVDS differential data input. Channel 0
Odd pixel Negative LVDS differential data input. Channel 1
Odd pixel Positive LVDS differential data input. Channel 1
Odd pixel Negative LVDS differential data input. Channel 2
Odd pixel Positive LVDS differential data input. Channel 2
Ground
Odd pixel Negative LVDS differential clock input
Odd pixel Positive LVDS differential clock input.
Ground
Odd pixel Negative LVDS differential data input. Channel 3
Odd pixel Positive LVDS differential data input. Channel 3
No Connection
No Connection
Ground
Even pixel Negative LVDS differential data input. Channel 0
Even pixel Positive LVDS differential data input. Channel 0
Even pixel Negative LVDS differential data input. Channel 1
Even pixel Positive LVDS differential data input. Channel 1
Even pixel Negative LVDS differential data input. Channel 2
Even pixel Positive LVDS differential data input. Channel 2
Ground
Even pixel Negative LVDS differential clock input.
Even pixel Positive LVDS differential clock input.
Ground
Even pixel Negative LVDS differential data input. Channel 3
Even pixel Positive LVDS differential data input. Channel 3
No Connection
No Connection
Ground
EEPROM Serial Clock (for auto Vcom)
EEPROM Serial Data (for auto Vcom)
No Connection
EEPROM Write Protection (for auto Vcom)
(0V~0.7VШDisable, 2.7V~3.3VШEnable)
44 PANEL_SEL No Connection
45 SELLVDS LVDS data format selection (2.7V~3.3VШVESA, 0V~0.7VШ
JEIDA).
Version 1.0
2011
11
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
Note
(2)
(7)
(7)
(7)
(2)
(7)
(7)
(7)
(2)
(2)
(2)
(3)(5)
DateΚ15 Feb.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com

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