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74HCT14PW の電気的特性と機能

74HCT14PWのメーカーはNXP Semiconductorsです、この部品の機能は「Hex inverting Schmitt trigger」です。


製品の詳細 ( Datasheet PDF )

部品番号 74HCT14PW
部品説明 Hex inverting Schmitt trigger
メーカ NXP Semiconductors
ロゴ NXP Semiconductors ロゴ 




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74HCT14PW Datasheet, 74HCT14PW PDF,ピン配置, 機能
74HC14; 74HCT14
Hex inverting Schmitt trigger
Rev. 6 — 19 September 2012
Product data sheet
1. General description
The 74HC14; 74HCT14 is a high-speed Si-gate CMOS device and is pin compatible with
Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74HC14; 74HCT14 provides six inverting buffers with Schmitt-trigger action. It is
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
2. Features and benefits
Low-power dissipation
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators

1 Page





74HCT14PW pdf, ピン配列
NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 7
14 VCC
13 6A
12 6Y
14 11 5A
10 5Y
9 4A
8 4Y
001aac498
terminal 1
index area
1Y 2
2A 3
2Y 4
3A 5
3Y 6
14
GND(1)
13 6A
12 6Y
11 5A
10 5Y
9 4A
001aac499
Transparent top view
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 5. Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
1A to 6A
1Y to 6Y
GND
VCC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
Description
data input 1
data output 1
ground (0 V)
supply voltage
7. Functional description
Table 3.
Input
nA
L
H
Function table[1]
[1] H = HIGH voltage level;
L = LOW voltage level.
Output
nY
H
L
74HC_HCT14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 19 September 2012
© NXP B.V. 2012. All rights reserved.
3 of 21


3Pages


74HCT14PW 電子部品, 半導体
NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
11. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Figure 7.
Symbol Parameter
Conditions
Tamb = 25 C
Min Typ Max
74HC14
tpd propagation delay nA to nY; see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
tt
transition time
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
CPD power dissipation per package; VI = GND to VCC
capacitance
74HCT14
tpd propagation delay nA to nY; see Figure 6
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
tt
transition time
VCC = 4.5 V; see Figure 6
CPD power dissipation per package;
capacitance
VI = GND to VCC 1.5 V
[1]
[2]
[3]
[1]
[2]
[3]
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
-
-
-
-
-
-
-
-
-
-
-
-
41 125
15 25
12 -
12 21
19 75
7 15
6 13
7-
20 34
17 -
7 15
8-
Tamb = 40 C to Unit
+125 C
Max Max
(85 C) (125 C)
155 190 ns
31 38 ns
- - ns
26 32 ns
95 110 ns
19 22 ns
15 19 ns
- - pF
43 51 ns
- - ns
19 22 ns
- - pF
74HC_HCT14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 19 September 2012
© NXP B.V. 2012. All rights reserved.
6 of 21

6 Page



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部品番号部品説明メーカ
74HCT14PW

Hex inverting Schmitt trigger

NXP Semiconductors
NXP Semiconductors


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