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74HCT14-Q100 の電気的特性と機能

74HCT14-Q100のメーカーはNXP Semiconductorsです、この部品の機能は「Hex inverting Schmitt trigger」です。


製品の詳細 ( Datasheet PDF )

部品番号 74HCT14-Q100
部品説明 Hex inverting Schmitt trigger
メーカ NXP Semiconductors
ロゴ NXP Semiconductors ロゴ 




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74HCT14-Q100 Datasheet, 74HCT14-Q100 PDF,ピン配置, 機能
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
Rev. 4 — 19 April 2013
Product data sheet
1. General description
The 74HC14-Q100; 74HCT14-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7A.
The 74HC14-Q100; 74HCT14-Q100 provides six inverting buffers with Schmitt-trigger
action. They are capable of transforming slowly changing input signals into sharply
defined, jitter-free output signals.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Low-power dissipation
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
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74HCT14-Q100 pdf, ピン配列
NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
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(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
1A to 6A
1Y to 6Y
GND
VCC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
Description
data input 1
data output 1
ground (0 V)
supply voltage
7. Functional description
Table 3.
Input
nA
L
H
Function table[1]
[1] H = HIGH voltage level;
L = LOW voltage level.
Output
nY
H
L
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
3 of 20


3Pages


74HCT14-Q100 電子部品, 半導体
NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
11. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; CL = 50 pF; for load circuit see Figure 7.
Symbol Parameter
Conditions
Tamb = 25 C
Min Typ Max
74HC14-Q100
tpd propagation delay nA to nY; see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
tt
transition time
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
CPD power dissipation per package; VI = GND to VCC
capacitance
74HCT14-Q100
tpd propagation delay nA to nY; see Figure 6
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
tt
transition time
VCC = 4.5 V; see Figure 6
CPD power dissipation per package;
capacitance
VI = GND to VCC 1.5 V
[1]
[2]
[3]
[1]
[2]
[3]
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD =C PD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
-
-
-
-
-
-
-
-
-
-
-
-
41 125
15 25
12 -
12 21
19 75
7 15
6 13
7-
20 34
17 -
7 15
8-
Tamb = 40 C to Unit
+125 C
Max Max
(85 C) (125 C)
155 190 ns
31 38 ns
- - ns
26 32 ns
95 110 ns
19 22 ns
15 19 ns
- - pF
43 51 ns
- - ns
19 22 ns
- - pF
74HC_HCT14_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 April 2013
© NXP B.V. 2013. All rights reserved.
6 of 20

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部品番号部品説明メーカ
74HCT14-Q100

Hex inverting Schmitt trigger

NXP Semiconductors
NXP Semiconductors


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