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PDF HFA1115 Data sheet ( Hoja de datos )

Número de pieza HFA1115
Descripción 225MHz/ Low Power/ Output Limiting/ Closed Loop Buffer Amplifier
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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HFA1115
September 1998
File Number 3606.4
225MHz, Low Power, Output
Limiting, Closed Loop Buffer Amplifier
The HFA1115 is a high speed closed loop Buffer featuring both
user programmable gain and output limiting. Manufactured on
Intersil’s proprietary complementary bipolar UHF-1 process, the
HFA1115 also offers a wide -3dB bandwidth of 225MHz, very
fast slew rate, excellent gain flatness and high output current.
This buffer is the ideal choice for high frequency applications
requiring output limiting, especially those needing ultra fast
overload recovery times. The limiting function allows the
designer to set the maximum positive and negative output
levels, thereby protecting later stages from damage or input
saturation. The HFA1115 also allows for voltage gains of +2,
+1, and -1, without the use of external resistors. Gain
selection is accomplished via connections to the inputs, as
described in the “Application Information” text. The result is a
more flexible product, fewer part types in inventory, and more
efficient use of board space.
Compatibility with existing op amp pinouts provides flexibility
to upgrade low gain amplifiers, while decreasing component
count. Unlike most buffers, the standard pinout provides an
upgrade path, should a higher closed loop gain be needed at
a future date. For Military product, refer to the HFA1115/883
data sheet.
Pinout
HFA1115
(PDIP, SOIC)
TOP VIEW
NC 1
350
-IN 2
+IN 3
350
_
+
V- 4
8 VH
7 V+
6 OUT
5 VL
Pin Descriptions
NAME
NC
-IN
+IN
V-
VL
OUT
V+
VH
PIN NUMBER
1
2
3
4
5
6
7
8
DESCRIPTION
No Connection
Inverting Input
Non-Inverting Input
Negative Supply
Lower Output Limit
Output
Positive Supply
Upper Output Limit
Features
• User Programmable Output Voltage Limiting
• High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 1M
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02%
• Differential Phase . . . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Wide -3dB Bandwidth (AV = +2) . . . . . . . . . . . . . . 225MHz
• Very Fast Slew Rate (AV = -1) . . . . . . . . . . . . . . 1135V/µs
• Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . . 7.1mA
• High Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 60mA
• Excellent Gain Accuracy . . . . . . . . . . . . . . . . . . . 0.99V/V
• User Programmable For Closed-Loop Gains of +1, -1 or
+2 Without Use of External Resistors
• Fast Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . <1ns
• Standard Operational Amplifier Pinout
Applications
• Flash A/D Drivers
• Video Cable Drivers
• High Resolution Monitors
• Professional Video Processing
• Medical Imaging
• Video Digitizing Boards/Systems
• Battery Powered Communications
Ordering Information
PART NUMBER
TEMP.
(BRAND)
RANGE (oC)
PACKAGE
PKG.
NO.
HFA1115IP
-40 to 85 8 Ld PDIP
E8.3
HFA1115IB
(H1115I)
-40 to 85 8 Ld SOIC
M8.15
HFA11XXEVAL High Speed Op Amp DIP Evaluation Board
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 page




HFA1115 pdf
HFA1115
The HFA1115’s closed loop gain implementation provides
better gain accuracy, lower offset and output impedance,
and better distortion compared with open loop buffers.
Closed Loop Gain Selection
This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1 (see next section for layout caveats), while grounding -IN
selects a gain of +2. A gain of -1 is obtained by applying the
input signal to -IN with +IN grounded through a 50resistor.
The table below summarizes these connections:
GAIN
(AV)
-1
+1
+2
CONNECTIONS
+INPUT (PIN 3)
-INPUT (PIN 2)
50to GND
Input
Input
NC (Floating)
Input
GND
Unity Gain Considerations
Unity gain selection is accomplished by floating the -Input of
the HFA1115. Anything that tends to short the -Input to GND,
such as stray capacitance at high frequencies, will cause the
amplifier gain to increase toward a gain of +2. The result is
excessive high frequency peaking, and possible instability.
Even the minimal amount of capacitance associated with
attaching the -Input lead to the PCB results in approximately
3dB of gain peaking. At a minimum this requires due care to
ensure the minimum capacitance at the -Input connection. .
TABLE 1. UNITY GAIN PERFORMANCE FOR VARIOUS
IMPLEMENTATIONS
APPROACH
PEAK-
ING
(dB)
BW
(MHz)
+SR/-SR
(V/µs)
±0.1dB
GAIN
FLATNESS
(MHz)
Remove Pin 2
2.5 400 1200/850
20
+RS = 620
+RS = 620and
Remove Pin 2
0.6
0
170 1125/800
165 1050/775
25
65
Short Pins 2, 3
0 200 875/550
45
100pF cap. be- 0.2 190 900/550
tween pins 2, 3
19
Table 1 lists five alternate methods for configuring the
HFA1115 as a unity gain buffer, and the corresponding
performance. The implementations vary in complexity and
involve performance trade-offs. The easiest approach to
implement is simply shorting the two input pins together, and
applying the input signal to this common node. The amplifier
bandwidth drops from 400MHz to 200MHz, but excellent
gain flatness is the benefit. Another drawback to this
approach is that the amplifier input noise voltage and input
offset voltage terms see a gain of +2, resulting in higher
noise and output offset voltages. Alternately, a 100pF
capacitor between the inputs shorts them only at high
frequencies, which prevents the increased output offset
voltage but delivers less gain flatness.
Another straightforward approach is to add a 620resistor
in series with the positive input. This resistor and the
HFA1115 input capacitance form a low pass filter which rolls
off the signal bandwidth before gain peaking occurs. This
configuration was employed to obtain the datasheet AC and
transient parameters for a gain of +1.
Non-inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be 50Ω. This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
Pulse Undershoot and Asymmetrical Slew Rates
The HFA1115 utilizes a quasi-complementary output stage to
achieve high output current while minimizing quiescent supply
current. In this approach, a composite device replaces the
traditional PNP pulldown transistor. The composite device
switches modes after crossing 0V, resulting in added
distortion for signals swinging below ground, and an
increased undershoot on the negative portion of the output
waveform (see Figures 9, 13, and 17). This undershoot isn’t
present for small bipolar signals, or large positive signals.
Another artifact of the composite device is asymmetrical slew
rates for output signals with a negative voltage component.
The slew rate degrades as the output signal crosses through
0V (see Figures 9, 13, and 17), resulting in a slower overall
negative slew rate. Positive only signals have symmetrical
slew rates as illustrated in the large signal positive pulse
response graphs (see Figures 7, 11, and 15).
PC Board Layout
This amplifier’s frequency response depends greatly on the
care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the input
and output of the device. Capacitance directly on the output
must be minimized, or isolated as discussed in the next section.
For unity gain applications, care must also be taken to
minimize the capacitance to ground at the amplifier’s
inverting input. At higher frequencies this capacitance tends
to short the -INPUT to GND, resulting in a closed loop gain
which increases with frequency. This causes excessive high
frequency peaking and potentially other problems as well.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
5

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HFA1115 arduino
HFA1115
Typical Performance Curves VSUPPLY = ±5V, TA = 25oC, RL = 100, Unless Otherwise Specified (Continued)
AV = +1, VOUT = 4VP-P
3
0
-3
-6
AV = +2, VOUT = 5VP-P
-9
AV = -1, VOUT = 5VP-P
1 10 100 1000
FREQUENCY (MHz)
FIGURE 22. FULL POWER BANDWIDTH
260
250
240
230
220 AV = +2
210
200
190 AV = +1
180
AV = -1
170
-75
-50 -25 0 25 50 75
TEMPERATURE (oC)
100 125
FIGURE 23. -3dB BANDWIDTH vs TEMPERATURE
VOUT = 200mVP-P
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
AV = +1
AV = -1
AV = +2
1 10
FREQUENCY (MHz)
FIGURE 24. GAIN FLATNESS
100
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
AV = +2
AV = -1
AV = +1
1 10 100
FREQUENCY (MHz)
FIGURE 25. REVERSE ISOLATION (S12)
1000
AV = +2
1K
100
10
1
0.1
0.01
0.3 1
10 100
FREQUENCY (MHz)
FIGURE 26. OUTPUT RESISTANCE
1000
0.1
0.05
0.025
0
-0.025
-0.05
-0.1
3 13 23 33 43 53 63 73 83
TIME (ns)
FIGURE 27. SETTLING TIME RESPONSE
93 103
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