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PDF FSD176MRT Data sheet ( Hoja de datos )
| Número de pieza | FSD176MRT | |
| Descripción | Green-Mode Fairchild Power Switch | |
| Fabricantes | Fairchild Semiconductor | |
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January 2014
FSD176MRT
Green-Mode Fairchild Power Switch (FPS™)
Features
Advanced Soft Burst-Mode Operation for
Low Standby Power and Low Audible Noise
Random Frequency Fluctuation for Low EMI
Pulse-by-Pulse Current Limit
Various Protection Functions: Overload Protection
(OLP), Over-Voltage Protection (OVP), Abnormal
Over-Current Protection (AOCP), Internal Thermal
Shutdown (TSD) with Hysteresis, Output-Short
Protection (OSP), and Under-Voltage Lockout (UVLO)
with Hysteresis
Low Operating Current (0.4 mA) in Burst Mode
Internal Startup Circuit
Internal High-Voltage SenseFET: 650 V
Built-in Soft-Start: 15 ms
Auto-Restart Mode
Description
The FSD176MRT is an integrated Pulse Width
Modulation (PWM) controller and SenseFET specifically
designed for offline Switch-Mode Power Supplies
(SMPS) with minimal external components. The PWM
controller includes an integrated fixed-frequency
oscillator, Under-Voltage Lockout (UVLO), Leading-
Edge Blanking (LEB), optimized gate driver, internal
soft-start, temperature-compensated precise current
sources for loop compensation, and self-protection
circuitry. Compared with a discrete MOSFET and PWM
controller solution, the FSD176MRT can reduce total
cost, component count, size, and weight; while
simultaneously increasing efficiency, productivity, and
system reliability. This device provides a basic platform
for cost-effective design of a flyback converter.
Applications
Power Supply for LCD Monitor, STB, and
DVD Combination
Ordering Information
Part Number
Output Power Table(2)
Package
Operating
Junction
Temperature
Current RDS(ON) 230 VAC ±15%(3)
Limit
(Max.)
Adapter(4)
Open
Frame(5)
85~265 VAC
Adapter(4)
Open
Frame(5)
Replaces
Device
TO-220
FSD176MRTUDT
U
6-Lead(1)
U-
-40°C
~
+125°C
3.50 A
Forming
1.6 Ω
80 W
90 W
48 W
70 W
FSGM0765
R
TO-220
FSD176MRTLDTU
6-Lead(1)
L-
-40°C
~
+125°C
Forming
3.50A
1.6Ω
80W
90W
48W
70 W
FSGM0765
R
Notes:
1. Pb-free package per JEDEC J-STD-020B.
2. The junction temperature can limit the maximum output power.
3. 230 VAC or 100 / 115 VAC with voltage doubler.
4. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.
5. Maximum practical continuous power in an open-frame design at 50°C ambient temperature.
© 2011 Fairchild Semiconductor Corporation
FSD176MRT • Rev. 1.0.1
www.fairchildsemi.com
1 page  
Electrical Characteristics
TJ = 25°C unless otherwise specified.
Symbol
Parameter
SenseFET Section
BVDSS
IDSS
RDS(ON)
Drain-Source Breakdown Voltage
Zero-Gate-Voltage Drain Current
Drain-Source On-State Resistance
CISS
Input Capacitance(12)
COSS
Output Capacitance(12)
tr Rise Time
tf Fall Time
td(on)
Turn-On Delay
td(off)
Turn-Off Delay
Control Section
fS Switching Frequency(12)
ΔfS Switching Frequency Variation(12)
DMAX Maximum Duty Ratio
DMIN
Minimum Duty Ratio
IFB Feedback Source Current
VSTART
VSTOP
UVLO Threshold Voltage
tS/S Internal Soft-Start Time
Burst-Mode Section
VBURH
VBURL Burst-Mode Voltage
VHys
Protection Section
ILIM
VSD
IDELAY
tLEB
VOVP
tOSP
VOSP
tOSP_FB
TSD
THys
Peak Drain Current Limit
Shutdown Feedback Voltage
Shutdown Delay Current
Leading-Edge Blanking Time(12)(14)
Over-Voltage Protection
Output-Short
Protection(12)
Threshold Time
Threshold VFB
VFB Blanking Time
Thermal Shutdown Temperature(12)
Conditions
VCC = 0 V, ID = 250 μA
VDS = 650 V, TA = 25°C
VGS=10 V, ID =1A
VDS = 25 V, VGS = 0 V,
f=1 MHz
VDS = 25 V, VGS = 0 V,
f=1 MHz
VDS = 325 V, ID = 4 A,
RG=25 Ω
VDS = 325 V, ID = 4 A,
RG=25 Ω
VDS = 325 V, ID = 4 A,
RG=25 Ω
VDS = 325 V, ID= 4 A,
RG=25 Ω
VCC = 14 V, VFB = 4 V
-25°C < TJ < 125°C
VCC = 14 V, VFB = 4 V
VCC = 14 V, VFB = 0 V
VFB=0 V
VFB = 0 V, VCC Sweep
After Turn-on, VFB = 0 V
VSTR = 40 V, VCC Sweep
VCC = 14 V, VFB Sweep
di/dt = 300 mA/μs
VCC = 14 V, VFB Sweep
VCC = 14 V, VFB = 4 V
VCC Sweep
OSP Triggered when
tON<tOSP & VFB>VOSP
(Lasts Longer than tOSP_FB)
Shutdown Temperature
Hysteresis
© 2011 Fairchild Semiconductor Corporation
FSD176MRT • Rev. 1.0.1
5
Min. Typ. Max. Unit
650
250
1.3 1.6
674
93
30
26
16
39
V
μA
Ω
pF
pF
ns
ns
ns
ns
61 67 73 kHz
±5 ±10
%
61 67 73
%
%
65 90 115 μA
11 12 13
V
7.0 7.5 8.0
V
15 ms
0.39 0.45 0.51
0.26 0.30 0.34
150
V
V
mV
3.15 3.50 3.85
6.45 7.00 7.55
1.2 2.0 2.8
300
23.0 24.5 26.0
0.7 1.0 1.3
1.8 2.0 2.2
2.0 2.5 3.0
130 140 150
60
A
V
μA
ns
V
μs
V
μs
°C
°C
Continued on the following page…
www.fairchildsemi.com
5 Page 
4.3. Output-Short Protection (OSP): If the output is
shorted, steep current with extremely high di/dt can
flow through the SenseFET during the minimum turn-
on time. Such a steep current brings high-voltage
stress on the drain of the SenseFET when turned off.
To protect the device from this abnormal condition,
OSP is included. It is comprised of detecting VFB and
SenseFET turn-on time. When the VFB is higher than
2.0 V and the SenseFET turn-on time is lower than
1.0 μs, the FSD176MRT recognizes this condition as
an abnormal error and shuts down PWM switching
until VCC reaches VSTART again. An abnormal condition
output short is shown in Figure 22.
5. Soft Burst-Mode Operation: To minimize power
dissipation in Standby Mode, the FSD176MRT enters
Burst-Mode operation. As the load decreases, the
feedback voltage decreases. The device automatically
enters Burst Mode when the feedback voltage drops
below VBURL (300 mV), as shown in Figure 23. At this
point, switching stops and the output voltages start to
drop at a rate dependent on standby current load. This
causes the feedback voltage to rise. Once it passes
VBURH (450 mV), switching resumes. The feedback
voltage then falls and the process repeats. Burst Mode
alternately enables and disables switching of the
SenseFET, reducing switching loss in Standby Mode.
Figure 22. Output-Short Protection
4.4 Over-Voltage Protection (OVP): If the
secondary-side feedback circuit malfunctions or a
solder defect causes an opening in the feedback path,
the current through the opto-coupler transistor
becomes almost zero. Then VFB climbs up in a similar
manner to the overload situation, forcing the preset
maximum current to be supplied to the SMPS until the
overload protection is triggered. Because more energy
than required is provided to the output, the output
voltage may exceed the rated voltage before the
overload protection is triggered, resulting in the
breakdown of the devices in the secondary side. To
prevent this situation, an OVP circuit is employed. In
general, the VCC is proportional to the output voltage
and the FSD176MRT uses VCC instead of directly
monitoring the output voltage. If VCC exceeds 24.5 V,
an OVP circuit is triggered, resulting in the termination
of the switching operation. To avoid undesired
activation of OVP during normal operation, VCC should
be designed to be below 24.5 V.
4.5 Thermal Shutdown (TSD): The SenseFET and
the control IC on a die in one package makes it easier
for the control IC to detect the over temperature of the
SenseFET. If the temperature exceeds ~140°C, the
thermal shutdown is triggered and stops operation.
The FSD176MRT operates in auto-restart mode until
the temperature decreases to around 75°C, when
normal operation resumes.
Figure 23. Burst-Mode Operation
6. Random Frequency Fluctuation (RFF): Fluctuating
switching frequency of an SMPS can reduce EMI by
spreading the energy over a wide frequency range. The
amount of EMI reduction is directly related to the
switching frequency variation, which is limited internally.
The switching frequency is determined randomly by
external feedback voltage and an internal free-running
oscillator at every switching instant. This random
frequency fluctuation scatters the EMI noise around
typical switching frequency (67 kHz) effectively and can
reduce the cost of the input filter included to meet the
EMI requirements (e.g. EN55022).
© 2011 Fairchild Semiconductor Corporation
FSD176MRT • Rev. 1.0.1
Figure 24. Random Frequency Fluctuation
www.fairchildsemi.com
11
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| PDF Descargar | [ Datasheet FSD176MRT.PDF ] | |
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