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PDF STM8L162R8 Data sheet ( Hoja de datos )
| Número de pieza | STM8L162R8 | |
| Descripción | 8-bit ultralow power MCU | |
| Fabricantes | ST Microelectronics | |
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STM8L162R8
STM8L162M8
8-bit ultralow power MCU, 64 KB Flash, 2 KB data EEPROM
RTC, AES, LCD, timers, USARTs, I2C, SPIs, ADC, DAC, COMPs
Preliminary data
Features
■ Operating conditions
– Operating power supply: 1.65 to 3.6 V
(without BOR), 1.8 to 3.6 V (with BOR)
– Temperature range: −40 to 85 or 125 °C
■ Low power features
– 5 low power modes: Wait, Low power run,
Low power wait, Active-halt with RTC, Halt
– Ultralow leakage per I/0: 50 nA
– Fast wakeup from Halt: 5 µs
■ Advanced STM8 core
– Harvard architecture and 3-stage pipeline
– Max freq: 16 MHz, 16 CISC MIPS peak
– Up to 40 external interrupt sources
■ Reset and supply management
– Low power, ultrasafe BOR reset with 5
selectable thresholds
– Ultralow power POR/PDR
– Programmable voltage detector (PVD)
■ Clock management
– 32 kHz and 1-16 MHz crystal oscillators
– Internal 16 MHz factory-trimmed RC
– Internal 38 kHz low consumption RC
– Clock security system
■ Low power RTC
– BCD calendar with alarm interrupt
– Digital calibration with +/- 0.5ppm accuracy
– LSE security system
– Auto-wakeup from Halt w/ periodic interrupt
– Advanced anti-tamper detection
■ LCD: 8x40 or 4x44 w/ step-up converter
■ Memories
– 64 KB of Flash program memory plus 2 KB
of data EEPROM with ECC and RWW
– Flexible write/read protection modes
– 4 KB of RAM
LQFP80
LQFP64
■ DMA
– 4 channels supporting ADC, AES, DACs,
SPIs, I2C, USARTs, timers
– 1 channel for memory-to-memory
■ AES encryption hardware accelerator
■ 2x12-bit DAC (dual mode) with output buffer
■ 12-bit ADC up to 1 Msps/28 channels
– Temp. sensor and internal ref. voltage
■ 2 ultralow power comparators (COMP)
– 1 with fixed threshold and 1 rail to rail
– Wakeup capability
■ Timers
– Three 16-bit timers with 2 channels (IC,
OC, PWM), quadrature encoder
– One 16-bit advanced control timer with 3
channels, supporting motor control
– One 8-bit timer with 7-bit prescaler
– 1 Window and 1 independent watchdog
– Beeper timer with 1, 2 or 4 kHz frequencies
■ Communication interfaces
– Two synchronous serial interface (SPI)
– Fast I2C 400 kHz SMBus and PMBus
– Three USARTs (ISO 7816 interface + IrDA)
■ Up to 67 I/Os, all mappable on interrupt vectors
■ Up to 16 capacitive sensing channels with free
firmware
■ Development support
– Fast on-chip programming and non-
intrusive debugging with SWIM
– Bootloader using USART
■ 96-bit unique ID
September 2010
Doc ID 17959 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/110
www.st.com
1
1 page  
www.DataSheet.in
STM8L162R8, STM8L162M8
List of tables
List of tables
Table 1.
Table 2.
Table 3.
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Table 5.
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Table 37.
Table 38.
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Table 40.
Table 41.
Table 42.
Table 43.
Table 44.
Table 45.
Table 46.
High density STM8L162x low power device features and peripheral counts . . . . . . . . . . . . 4
Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Legend/abbreviation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
STM8L162x pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Flash and RAM boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Factory conversion regiserst. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
I/O port hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
General hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
CPU/SWIM/debug module/interrupt controller registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Interrupt mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Option byte addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Option byte description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Unique ID registers (96 bits) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Total current consumption in Run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Total current consumption in Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Total current consumption and timing in Low power run mode at VDD = 1.65 V to
3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Total current consumption in Low power wait mode at VDD = 1.65 V to 3.6 V . . . . . . . . . 68
Total current consumption and timing in Active-halt mode
at VDD = 1.65 V to 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Typical current consumption in Active-halt mode, RTC clocked by LSE external crystal . . 71
Total current consumption and timing in Halt mode at VDD = 2 V . . . . . . . . . . . . . . . . . . . 71
Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Current consumption under external reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
HSE external clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
LSE external clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
LSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Flash program and data EEPROM memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Output driving current (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Output driving current (true open drain ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Output driving current (PA0 with high sink LED driver capability). . . . . . . . . . . . . . . . . . . . 83
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
SPI1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
I2C characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
LCD characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Reference voltage characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Comparator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Doc ID 17959 Rev 1
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5 Page 
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STM8L162R8, STM8L162M8
Description
2.3 Ultralow power continuum
The Ultralow power STM8L151xx, STM8L152xx and STM8L162xx are fully pin-to-pin,
software and feature compatible. Besides the full compatibility within the family, the devices
are part of STMicroelectronics microcontrollers UltraLow power strategy which also includes
STM8L101xx and STM32L15xxx. The STM8L and STM32L families allow a continuum of
performance, peripherals, system architecture, and features.
They are all based on STMicroelectronics 0.13 µm Ultralow leakage process.
Note: 1 The STM8L151xx and STM8L152xx are pin-to-pin compatible with STM8L101xx devices.
2 The STM32L family is pin-to-pin compatible with the general purpose STM32F family.
Please refer to STM32L15xx documentation for more information on these devices.
Performance
All families incorporate highly energy-efficient cores with both Harvard architecture and
pipelined execution: advanced STM8 core for STM8L families and ARM Cortex™-M3 core
for STM32L family. In addition specific care for the design architecture has been taken to
optimize the mA/DMIPS and mA/MHz ratios.
This allows the Ultralow power performance to range from 5 up to 33.3 DMIPs.
Shared peripherals
STM8L151xx/152xx/162xx and STM32L15xx share identical peripherals which ensure a
very easy migration from one family to another:
● Analog peripherals: ADC1, DAC1/DAC2, and comparators COMP1/COMP2
● Digital peripherals: RTC and some communication interfaces
Common system strategy
To offer flexibility and optimize performance, the STM8L15xx/162xx and STM32L15xx
devices use a common architecture:
● Same power supply range from 1.65 to 3.6 V. For STM8L101xx and medium density
STM8L15xx, the power supply must be above 1.8 V at power-on, and go below 1.65 V
at power-down.
● Architecture optimized to reach ultralow consumption both in low power modes and
Run mode
● Fast startup strategy from low power modes
● Flexible system clock
● Ultrasafe reset: same reset strategy for both STM8L15xx/162xx and STM32L15xx
including power-on reset, power-down reset, brownout reset and programmable
voltage detector.
Features
ST UtraLow power continuum also lies in feature compatibility:
● More than 10 packages with pin count from 20 to 100 pins and size down to 3 x 3 mm
● Memory density ranging from 4 to 128 Kbytes
Doc ID 17959 Rev 1
5/110
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet STM8L162R8.PDF ] | |
Hoja de datos destacado
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