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PDF ADM1027 Data sheet ( Hoja de datos )
| Número de pieza | ADM1027 | |
| Descripción | dBCOOL Remote Thermal Controller and Voltage Monitor | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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dBCOOL Remote Thermal™ www.DataSheet4U.com
Controller and Voltage Monitor
ADM1027*
FEATURES
Monitors up to 5 Supply Voltages
Controls and Monitors up to 4 Fan Speeds
1 On-Chip and 2 Remote Temperature Sensors
Monitors up to 5 Processor VID Bits
Automatic Fan Speed Control Mode Controls System
Cooling Based on Measured Temperature
Enhanced Acoustic Mode Dramatically Reduces User
Perception of Changing Fan Speeds
2-Wire and 3-Wire Fan Speed Measurement
Limit Comparison of All Monitored Values
Meets SMBus 2.0 Electrical Specifications
(Fully SMBus 1.1 Compliant)
APPLICATIONS
Low Acoustic Noise PCs
Networking and Telecommunications Equipment
GENERAL DESCRIPTION
The ADM1027 dBCOOL controller is a complete systems
monitor and multiple PWM fan controller for noise sensitive
applications requiring active system cooling. It can monitor
12 V, 5 V, 2.5 V CPU supply voltage, plus its own supply volt-
age. It can monitor the temperature of up to two remote sensor
diodes, plus its own internal temperature. It can measure and
control the speed of up to four fans so that they operate at the
lowest possible speed for minimum acoustic noise. The auto-
matic fan speed control loop optimizes fan speed for a given
temperature. Once the control loop parameters are programmed,
the ADM1027 can vary fan speed without CPU intervention.
FUNCTIONAL BLOCK DIAGRAM
ADDR
SELECT ADDR EN SCL SDA SMBALERT
VID4
VID3
VID2
VID1
VID0
PWM1
PWM2
PWM3
TACH1
TACH2
TACH3
TACH4
VCC
D1+
D1–
D2+
D2–
+5VIN
+12VIN
+2.5VIN
VCCP
PWM
REGISTERS
AND
CONTROLLERS
VID
REGISTER
ACOUSTIC
ENHANCEMENT
CONTROL
SMBUS
ADDRESS
SELECTION
SERIAL BUS
INTERFACE
ADDRESS
POINTER
REGISTER
AUTOMATIC
FAN SPEED
CONTROL
PWM
CONFIGURATION
REGISTERS
VCC TO ADM1027
FAN SPEED
COUNTER
BAND GAP
TEMP. SENSOR
INPUT
SIGNAL
CONDITIONING
AND
ANALOG
MULTIPLEXER
ADM1027
10-BIT
ADC
BAND GAP
REFERENCE
INTERRUPT
MASKING
INTERRUPT
STATUS
REGISTERS
LIMIT
COMPARATORS
VALUE AND
LIMIT
REGISTERS
GND
*Protected by U.S. Patent Nos. 6,188,189; 6,169,442; 6,097,239; 5,982,221;
and 5,867,012. Other patents pending.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
1 page  
ADM1027www.DataSheet4U.com
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic
Description
1 SDA
Digital I/O (Open-Drain). SMBus bidirectional serial data. Requires SMBus pull-up.
2 SCL
Digital Input (Open-Drain). SMBus serial clock input. Requires SMBus pull-up.
3 GND
Ground Pin for the ADM1027.
4 VCC
Power Supply. Can be powered by 3.3 V standby if monitoring in low power states is required.
VCC is also monitored through this pin. The ADM1027 can also be powered from a 5 V supply.
Setting Bit 7 of Configuration Register 1 (Reg. 0x40) rescales the VCC input attenuators to
correctly measure a 5 V supply.
5 VID0
Digital Input (Open-Drain). Voltage supply readouts from CPU. This value is read into the
VID register (Reg. 0x43).
6 VID1
Digital Input (Open-Drain). Voltage supply readouts from CPU. This value is read into the
VID register (Reg. 0x43).
7 VID2
Digital Input (Open-Drain). Voltage supply readouts from CPU. This value is read into the
VID register (Reg. 0x43).
8 VID3
Digital Input (Open-Drain). Voltage supply readouts from CPU. This value is read into the
VID register (Reg. 0x43).
9 TACH3
10 PWM2/SMBALERT
Digital Input (Open-Drain). Fan tachometer input to measure speed of Fan 3. Can be
reconfigured as an analog input (AIN3) to measure the speed of 2-wire fans.
Digital Output (Open-Drain). Requires 10 kW typical pull-up. Pulsewidth modulated output
to control Fan 2 speed. This pin may be reconfigured as an SMBALERT interrupt output to
signal out-of-limit conditions.
11 TACH1
Digital Input (Open-Drain). Fan tachometer input to measure speed of Fan 1. Can be
reconfigured as an analog input (AIN1) to measure the speed of 2-wire fans.
12 TACH2
Digital Input (Open-Drain). Fan tachometer input to measure speed of Fan 2. Can be
reconfigured as an analog input (AIN2) to measure the speed of 2-wire fans.
13 PWM3/ADDRESS ENABLE Digital I/O (Open-Drain). Pulsewidth modulated output to control Fan 3 speed. Requires
10 kW typical pull-up. If pulled low on power-up, this places the ADM1027 into address
select mode, and the state of Pin 14 will determine the ADM1027’s slave address.
14 TACH4/ADDRESS SELECT Digital Input (Open-Drain). Fan tachometer input to measure speed of Fan 4. Can be reconfigured
as an analog input (AIN4) to measure the speed of 2-wire fans. If in address select mode,
this pin determines the SMBus device address.
15 D2–
Cathode Connection to Second Thermal Diode.
16 D2+
Anode Connection to Second Thermal Diode.
17 D1–
Cathode Connection to First Thermal Diode.
18 D1+
Anode Connection to First Thermal Diode.
19 VID4
Digital Input (Open-Drain). Voltage supply readouts from CPU. This value is read into the
VID register (Reg. 0x43).
20 5VIN
21 12VIN
22 2.5VIN
23 VCCP
24 PWM1/XTO
Analog Input. Monitors 5 V power supply.
Analog Input. Monitors 12 V power supply.
Analog Input. Monitors 2.5 V supply, typically a chipset voltage.
Analog Input. Monitors processor core voltage (0 V to 3 V).
Digital Output (Open-Drain). Pulsewidth modulated output to control Fan 1 speed. Requires
10 kW typical pull-up. Also functions as the output from the XOR tree in XOR test mode.
REV. A
–5–
5 Page 
5. Once the ADM1027 has responded to the alert response
address, the master must read the status registers and the
SMBALERT will only be cleared if the error condition has
gone away.
SMBus Timeout
The ADM1027 includes an SMBus timeout feature. If there is
no SMBus activity for a minimum of 15 ms and a maximum of
35 ms, the ADM1027 assumes that the bus is locked and releases
the bus. This prevents the device from locking or holding the
SMBus expecting data. Some SMBus controllers cannot handle
the SMBus timeout feature, so it can be disabled.
CONFIGURATION REGISTER 1 – Register 0x40
<6> TODIS = 0; SMBus timeout enabled (default)
<6> TODIS = 1; SMBus timeout disabled
VOLTAGE MEASUREMENT INPUTS
The ADM1027 has four external voltage measurement channels.
It can also measure its own supply voltage, VCC.
Pins 20 to 23 are dedicated to measuring 5 V, 12 V, 2.5 V supplies
and the processor core voltage VCCP (0 V to 3 V input). The
VCC supply voltage measurement is carried out through the VCC
pin (Pin 4). Setting Bit 7 of Configuration Register 1 (Reg. 0x40)
allows a 5 V supply to power the ADM1027 and be measured
without overranging the VCC measurement channel. The 2.5 V
input can be used to monitor a chipset supply voltage in com-
puter systems.
ANALOG-TO-DIGITAL CONVERTER
All analog inputs are multiplexed into the on-chip, successive
approximation, analog-to-digital converter. This has a resolu-
tion of 10 bits. The basic input range is 0 V to 2.25 V, but the
inputs have built-in attenuators to allow measurement of 2.5 V,
3.3 V, 5 V, 12 V and the processor core voltage VCCP, without
any external components. To allow for the tolerance of these
supply voltages, the ADC produces an output of 3/4 full scale
(768 decimal or 300 hex) for the nominal input voltage, and so
has adequate headroom to cope with overvoltages.
INPUT CIRCUITRY
The internal structure for the analog inputs is shown in Figure 12.
Each input circuit consists of an input protection diode, an
attenuator, and a capacitor to form a first order low-pass filter
that gives the input immunity to high frequency noise.
VOLTAGE MEASUREMENT REGISTERS
Reg. 0x20 2.5 V Reading = 0x00 default
Reg. 0x21 VCCP Reading = 0x00 default
Reg. 0x22 VCC Reading = 0x00 default
Reg. 0x23 5 V Reading = 0x00 default
Reg. 0x24 12 V Reading = 0x00 default
ADM1027www.DataSheet4U.com
VOLTAGE MEASUREMENT LIMIT REGISTERS
Associated with each voltage measurement channel are high and
low limit registers. Exceeding the programmed high or low limit
causes the appropriate status bit to be set. Exceeding either limit
can also generate SMBALERT interrupts.
Reg. 0x44 2.5 V Low Limit = 0x00 default
Reg. 0x45 2.5 V High Limit = 0xFF default
Reg. 0x46 VCCP Low Limit = 0x00 default
Reg. 0x47 VCCP High Limit = 0xFF default
Reg. 0x48 VCC Low Limit = 0x00 default
Reg. 0x49 VCC High Limit = 0xFF default
Reg. 0x4A 5 V Low Limit = 0x00 default
Reg. 0x4B 5 V High Limit = 0xFF default
Reg. 0x4C 12 V Low Limit = 0x00 default
Reg. 0x4D 12 V High Limit = 0xFF default
12VIN
120k⍀
20k⍀
30pF
5VIN
93k⍀
47k⍀
30pF
3.3VIN
68k⍀
71k⍀
30pF
MUX
2.5VIN
45k⍀
94k⍀
30pF
VCCPIN
35k⍀
105k⍀
35pF
Figure 12. Structure of Analog Inputs
Table II shows the input ranges of the analog inputs and output
codes of the 10-bit A/D converter.
When the ADC is running, it samples and converts a voltage
input in 711 ms, and averages 16 conversions to reduce noise.
Therefore a measurement on any input takes nominally 11.38 ms.
REV. A
–11–
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADM1027.PDF ] | |
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