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ADV3222 の電気的特性と機能

ADV3222のメーカーはAnalog Devicesです、この部品の機能は「4:1 Analog Multiplexer」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADV3222
部品説明 4:1 Analog Multiplexer
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADV3222 Datasheet, ADV3222 PDF,ピン配置, 機能
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800 MHz, 4:1 Analog Multiplexer
ADV3221/ADV3222
FEATURES
Excellent ac performance
−3 dB bandwidth
800 MHz (200 mV p-p)
750 MHz (2 V p-p)
Slew rate: 2400 V/μs
Low power: 75 mW, VS = ±5 V
Excellent video performance
100 MHz, 0.1 dB gain flatness
0.02% differential gain error/0.02° differential phase error
(RL = 150 Ω)
ADV3221 is a pin-for-pin upgrade to the HA4344
Gain = +1 (ADV3221) or gain = +2 (ADV3222)
Low all hostile crosstalk of −85 dB @ 5 MHz, and
−58 dB @ 100 MHz
Latched control lines for synchronous switching
High impedance output disable allows connection of
multiple devices without loading the output bus
16-lead SOIC
APPLICATIONS
Routing of high speed signals including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
GENERAL DESCRIPTION
The ADV3221 and ADV3222 are high speed, high slew rate,
buffered 4:1 analog multiplexers. They offer a −3 dB signal
bandwidth greater than 800 MHz and channel switch times
of less than 20 ns with 1% settling. With lower than −58 dB of
crosstalk and −67 dB isolation (at 100 MHz), the ADV3221 and
ADV3222 are useful in many high speed applications. The diffe-
rential gain error of less than 0.02% and differential phase error
of less than 0.02°, together with 0.1 dB gain flatness out to 100 MHz
while driving a 75 Ω back terminated load, make the ADV3221
and ADV3222 ideal for all types of signal switching.
The ADV3221/ADV3222 include an output buffer that can be
placed into a high impedance state. This allows multiple outputs
FUNCTIONAL BLOCK DIAGRAM
CS
DQ
DQ
ENABLE
LATCH
LATCH
A0
DQ
DQ
LATCH
LATCH
IN0
IN1
IN2
IN3
G = +1
(G = +2)
A1
CK1
CK2
DQ
LATCH
DQ
LATCH
100k
100k
Figure 1.
OUT
to be connected together for cascading stages without the off
channels loading the output bus. The ADV3221 has a gain of
+1, and the ADV3222 has a gain of +2; they both operate on ±5 V
supplies while consuming less than 7.5 mA of idle current. The
channel switching is performed via latched control lines, allowing
synchronous updating in a multiple ADV3221/ADV3222 envi-
ronment.
The ADV3221/ADV3222 are offered in a 16-lead SOIC package
and are available over the extended industrial temperature range of
−40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalog Devicesforitsuse,norforanyinfringementsofpatentsorother
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.

1 Page





ADV3222 pdf, ピン配列
ADVww3w2.D2at1aS/hAeetD4UV.co3m222
SPECIFICATIONS
VS = ±5 V, TA = 25°C, RL = 150 Ω, CL = 2 pF, ADV3221 at G = +1, ADV3222 at G = +2, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Gain Flatness
Propagation Delay
Settling Time
Slew Rate
NOISE/DISTORTION PERFORMANCE
Differential Gain Error
Differential Phase Error
Crosstalk, All Hostile
Off Isolation, Input to Output
Input Second-Order Intercept (ADV3222 Only)
Input Third-Order Intercept (ADV3222 Only)
Output 1 dB Compression Point (ADV3222 Only)
Input Voltage Noise
DC PERFORMANCE
Gain Error
Gain Matching
OUTPUT CHARACTERISTICS
Output Impedance
Output Disable Capacitance
Output Leakage Current
Output Voltage Range
Short-Circuit Current
INPUT CHARACTERISTICS
Input Offset Voltage
Input Offset Voltage Drift
Input Voltage Range
Input Capacitance
Input Resistance
Input Bias Current
SWITCHING CHARACTERISTICS
Enable On Time
Switching Time, 2 V Step
Switching Transient (Glitch)
Test Conditions/Comments
200 mV p-p
2 V p-p
0.1 dB, 200 mV p-p
0.1 dB, 2 V p-p
2 V p-p
1%, 2 V step
2 V step, peak
NTSC or PAL
NTSC or PAL
f = 100 MHz
f = 5 MHz
f = 100 MHz, one channel
f = 70 MHz, RL = 100 Ω
f = 70 MHz, RL = 100 Ω
f = 70 MHz, RL = 100 Ω
10 MHz to 100 MHz
No load
RL = 150 Ω
Channel-to-channel, no load
DC, enabled
Disabled
Disabled
Disabled
No load
RL = 150 Ω
Worst case (all configurations)
Any switch configuration
Output enabled
Output enabled
50% A0 to 1% settling
IN0 to IN1 switching
ADV3221
Min Typ Max
1000
750
100
100
700
5
2400
0.01
0.01
−87
−100
−67
16
1
0.75
1
0.02
1
2.8
2
±2.9 ±3
±2.8 ±3
50
±5 ±21
±10
±3
1.8
1 10
5 12
15
20
28
ADV3222
Min Typ Max
800
750
100
100
650
5
2700
0.02
0.02
−58
−85
−72
54
17
18.5
17
1
0.75
1
1
±2.9
±2.75
0.04
3
2
±3
±3
50
±5 ±21
±10
±1.5
1.8
1 10
6 12
15
20
55
Unit
MHz
MHz
MHz
MHz
ps
ns
V/μs
%
Degrees
dB
dB
dB
dBm
dBm
dBm
nV/√Hz
%
%
%
Ω
pF
μA
V
V
mA
mV
μV/°C
V
pF
μA
ns
ns
mV p-p
Rev. 0 | Page 3 of 20


3Pages


ADV3222 電子部品, 半導体
ADV3221/ADV3222
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage (V+ − V−)
Analog Input Voltage
Digital Input Voltage
Output Voltage (Disabled Output)
Output Short-Circuit Duration
Output Short-Circuit Current
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Rating
12 V
V− to V+
0 V to V+
(V+ − 1 V) to (V− + 1 V)
Momentary
50 mA
−65°C to +150°C
−40°C to +85°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type
θJA θJC Unit
16-Lead Narrow-Body SOIC
81
43
°C/W
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POWER DISSIPATION
The ADV3221/ADV3222 are operated with ±5 V supplies and
can drive loads down to 150 Ω, resulting in a wide range of
possible power dissipations. For this reason, extra care must
be taken to adjust the operating conditions based on ambient
temperature.
Packaged in a 16-lead narrow-body SOIC, the ADV3221 and
ADV3222 junction-to-ambient thermal impedance (θJA) is 81°C/W.
For long-term reliability, the maximum allowed junction tempera-
ture of the die, TJ, should not exceed 125°C. Temporarily exceeding
this limit may cause a shift in parametric performance due to a
change in stresses exerted on the die by the package. Figure 4
shows the range of the allowed internal die power dissipations
that meet these conditions over the −40°C to +85°C ambient
temperature range. When using Figure 4, do not include the
external load power in the maximum power calculation, but
do include the load current through the die output transistors.
1.50
TJ = 125°C
1.25
1.00
0.75
0.50
15
25 35 45 55 65 75
AMBIENT TEMPERATURE (°C)
85
Figure 4. Maximum Die Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. 0 | Page 6 of 20

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