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STE2004S の電気的特性と機能

STE2004SのメーカーはSTMicroelectronicsです、この部品の機能は「102 X 65 single-chip LCD controller/driver」です。


製品の詳細 ( Datasheet PDF )

部品番号 STE2004S
部品説明 102 X 65 single-chip LCD controller/driver
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 




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STE2004S Datasheet, STE2004S PDF,ピン配置, 機能
www.DataSheet4U.com
STE2004S
102 x 65 single-chip LCD controller/driver
Features
102 x 65 bits display data RAM
Programmable MUX rate
Programmable frame rate
X,Y programmable carriage return
Dual partial display mode
Row by row scrolling
N-line inversion
Automatic data RAM blanking procedure
Selectable input interface:
– I2C Bus Fast and Hs-mode (read and write)
– 8000 and 8080 Parallel Interfaces (read
and write)
– 3-lines and 4-lines SPI Interface (read and
write)
– 3-lines 9 bit Serial Interface (read and
write)
Fully integrated configurable LCD bias voltage
generator with:
– Selectable multiplication factor (up to 5X)
– Effective sensing for high precision output
– Eight selectable temperature compensation
coefficients
CMOS compatible inputs
Fully integrated oscillator requires no external
components
Designed for chip-on-glass (COG)
applications.
Low power consumption, suitable for battery
operated systems
Logic supply voltage range from 1.7 to 3.6V
High voltage generator supply voltage range
from 1.75 to 4.5V
Display supply voltage range from 4.5 to 14.5V
Backward compatibility with STE2001/2/4
Description
The STE2004S is a low power CMOS LCD
controller driver. Designed to drive a 65 rows by
102 columns graphic display, it provides all
necessary functions in a single chip, including
on-chip LCD supply and bias voltages generators,
resulting in a minimum of externals components
and in a very low power consumption.
STE2004S features six standard interfaces
(3-lines Serial, 3-lines SPI, 4-lines SPI, 68000
Parallel, 8080 parallel and I2C) for interfacing with
the host micro-controller.
OSC_IN
OSC_OUT
FR_IN
FR_OUT
VSENSE SLAVE
VLCD
VLCDSENSE
RES
VSSAUX
VDD1,2
VSS
CO to C101
R0 to R64
OSC
MASTER
SLAVE SYNC
BIAS VOLTAGE
GENERATOR
TIMING
GENERATOR
CLOCK
COLUMN
DRIVERS
DATA
LATCHES
ROW
DRIVERS
SHIFT
REGISTER
HIGH VOLTAGE
GENERATOR
RESET
DATA
REGISTER
65 x 102
RAM
SCROLL
LOGIC
TEST
INSTRUCTION
REGISTER
DISPLAY
CONTROL
LOGIC
I2C BUS 9 Bit SERIAL 3 & 4 Line SPI Parallel 8080 Parallel 68K
TEST_MODE
TEST_VREF
ICON_MODE
EXT
SEL 3
SEL 2
SEL 1
SA1 SAO SDOUT SCLK/SCL SDIN/SDA_IN SDA_OUT DB0 E/WR R/W- RD D/C
to
DB7
CS
LR0047
January 2007
Rev 3
1/7979
www.st.com
79

1 Page





STE2004S pdf, ピン配列
STE2004S
www.DataCShoenette4nU.tcsom
6 ID-number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
7.3 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
8 Pad coordinates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
9 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
3/79


3Pages


STE2004S 電子部品, 半導体
Pin description
www.DatSaTShEe2e0t40U4.cSom
Table 1. Pin description (continued)
N° Pad Type
Function
SCLK - SCL
SDA_OUT
SA0
SA1
DB0 to DB7
181
178
149
148
182-189
R/W - RD
175
E / WR
E / WR
RES
D/C
CS
TEST_MODE
TEST_VREF
176
176
172
174
173
191
146
I SCLK - Serial and SPI interface clock - cannot be left floating
I SCL - I2C bus clock - cannot be left floating
O I2C Bus data out - if unused must be left floating
I I2C slave address BIT 0 - cannot be left floating
I I2C slave address BIT 1- cannot be left floating
I/O Parallel interface 8 bit data bus - cannot be left floating
R/W - 68000 Series Parallel interface read and write control input
I
- cannot be left floating
RD - 8080 Series Parallel interface read enable clock input
I
- cannot be left floating
E - 68000 Series Parallel interface read and write clock input
I
- cannot be left floating
WR - 8080 Series Parallel interface - write enable clock input
I
- cannot be left floating
I Reset input. Active Low.
I Interface data/command selector- cannot be left floating
I
Serial and Parallel interfaces ENABLE. When Low the incoming data are
clocked In. Cannot be left floating
I Test Pad - 50 kohm internal pull-down must be connected to VSS/VSSAUX
O Test Pad - must be left floating
Oscillator Input:
OSC_IN
Configuration
OSCIN
144 I
High
Low
External Oscillator
Internal oscillator enabled
Internal oscillator disabled
Internal oscillator disabled
OSCOUT
FR_OUT
FR_IN
M/S
210 O Internal/external oscillator out - if unused must be left floating
211 O Master slave frame inversion synchronization - f unused must be left floating
143 I Master slave frame inversion synchronization - cannot be left floating
Master/slave configuration bit:- cannot be left floating
M/S PIN OSC_OUT FR_OUT FR_IN
Charge Pump
100 I High ENABLED Enabled Disabled AuxVsense disabled
Low
ENABLED Enabled
Enabled
Charge pump in slave
mode or ext power
6/79

6 Page



ページ 合計 : 30 ページ
 
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共有リンク

Link :


部品番号部品説明メーカ
STE2004

102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER

STMicroelectronics
STMicroelectronics
STE2004S

102 X 65 single-chip LCD controller/driver

STMicroelectronics
STMicroelectronics


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