STE2002 Datasheet PDF - STMicroelectronics
| Part Number | STE2002 | |
| Description | 81 X 128 single-chip LCD controller/driver | |
| Manufacturers | STMicroelectronics | |
| Logo |  |
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STE2002
81 x 128 single-chip LCD controller/driver
Features
■ 104 x 128 bits Display Data RAM
■ Programmable MUX rate
■ Programmable frame rate
■ X,Y Programmable carriage return
■ Dual partial display mode
■ Row by Row Scrolling
■ Automatic data RAM Blanking procedure
■ Selectable Input interface:
– I2C Bus Fast and Hs-mode (read and write)
– Parallel Interface (read and write)
– Serial Interface (read and write)
■ Fully Integrated oscillator requires no external
components
■ CMOS compatible inputs
■ Fully integrated configurable LCD bias voltage
generator with:
– Selectable multiplication factor (up to 6X)
– Effective sensing for High Precision Output
– Eight selectable temperature compensation
coefficients
■ Designed for chip-on-glass (COG) applications
■ Low power consumption, suitable for battery
operated systems
■ Logic supply voltage range from 1.7 to 3.6V
■ High voltage generator supply voltage range
from 1.75 to 4.2V
■ Display supply voltage range from 4.5 Vto
14.5V
■ Backward compatibility with STE2001
Description
The STE2002 is a low power CMOS LCD
controller driver. Designed to drive a 81 rows by
128 columns graphic display, provides all
necessary functions in a single chip, including on-
chip LCD supply and bias voltages generators,
resulting in a minimum of externals components
and in a very low power consumption. The
STE2002 features three standard interfaces
(Serial, Parallel & I2C) for ease of interfacing with
the host microcontroller.
Block diagram
CO to C127
R0 to R80 ICON
OSC_IN
OSC_OUT
VLCDIN
VLCDSENSE
VLCDOUT
RES
VSSAUX
VDD1,2
VSS
SEL1,2
SA1
OSC
TIMING
GENERATOR
COLUMN
DRIVERS
ROW
DRIVERS
BIAS VOLTAGE
GENERATOR
CLOCK
DATA
LATCHES
SHIFT
REGISTER
HIGH VOLTAGE
GENERATOR
RESET
DATA
REGISTER
104 x 128
RAM
SCROLL
LOGIC
TEST
INSTRUCTION
REGISTER
DISPLAY
CONTROL
LOGIC
TEST_1_14
ICON_MODE
EXT
BSY_FLG
I2CBUS
PARALLEL
SERIAL
SOUT
SAO SCL SDA_IN SDA_OUT DB0 to DB7 E R/W PD/C SCE SDIN SCLK SD/C
December 2006
Rev 3
1/61
www.st.com
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STE2002
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Table 1. Pin description (continued)
N° Pad Type
Function
R/W 219 I Parallel Interface Read & Write Control Line
E 229 I Parallel Interface Data Latch Signal.
PD/C 228 I Parallel Interface Data/Command Selector
SDIN 214 I Serial Interface Data Input
SCLK 217 I Serial Interface Clock
SCE
216 I Serial Interface ENABLE. When Low the Incoming Data are Clocked In.
SD/C 215 I Serial Interface Data/Command Selector
SOUT
BSYFLG
213
212
O Serial Out
O
Active Procedure Flag. Notice if There is an ongoing Internal Operation or an
active reset. Active Low.
Test Pads. - A 50kohm pull-down resistor is added on input pis.
T1 to T14
170-179,
256-259
I/O
Test Num.
TEST_1
TEST_2
TEST_3
TEST_4
TEST_5
TEST_6
TEST_7
TEST_8
TEST_9
TEST_10
TEST_11
TEST_12
TEST_13
TEST_14
Pin Configuration
OPEN
VSS / VSSAUX
VSS / VSSAUX
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for STE2002 electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ STE2002.PDF Datasheet ] | |
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