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PDF LC7930NW Data sheet ( Hoja de datos )

Número de pieza LC7930NW
Descripción LCD Drivers
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC7930NW Hoja de datos, Descripción, Manual

Ordering number: EN2778C
CMOS LSI
LC7930N, 7930NW
LCD Drivers
Overview
The LC7930N, 7930NW are CMOS LSIs which incorporate
20-bit shift register, latch, and two sets of 20 LCD drivers.
They also have two switching pins: one of them (channel 2)
can be used as a scan-line driver (back plate) and the other
(channel 1) as a segment driver. They are optimal for LCD
interface with microcontroller (4 or 8 bits) or dot matrix
controller circuit incorporating character generator.
Package Dimensions
unit : mm
3055A-QFP60C
[LC7930N]
Features
. Two channels of 20 output segment drivers
. The configuration of 20 output segment drivers + 20
. scanning terminal drivers available
A series data to connect with the microcontroller and three
control signals
. Able to be connected in series for large display
. Built-in bidirectional shift register can be shifted in the
. direction that makes wiring easy
Operating supply voltage/ Operating temperature:
. VDD = 4.5 to 5.5 V / Topr = –20 to +75°C
Operating current drain : IDD = 1.0 mA max
. (Logic = 400 kHz, LCD = 1 kHz)
Package : Pin 60 Flat LC7930N : QIP60
Pin 64 Flat LC7930NW : SQFP64
unit : mm
3190-SQFP64
SANYO : QIP60C
[LC7930NW]
SANYO : SQFP64
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
13097HA(II)/12593JN/6031JN/6218TA,TS No.2778-1/7

1 page




LC7930NW pdf
LC7930N, 7930NW
Pin Descriptions
Pin Name
VDD
VSS
VEE
Y1 to Y20
Y21 to Y40
V1, V2
V3, V4
V5, V6
L/R1
Function
Logic circuitry power supply (+5 V ±10%)
0V
LCD driver power supply (–4 to –6 V)
Channel 1 LCD driver output pins
Channel 2 LCD driver output pins
Reference voltage for selected driver outputs
Reference voltage for non-selected driver outputs (channel 1)
Reference voltage for non-selected driver outputs (channel 2)
Shift direction for channel 1 shift register
L/R1
High-level
Low-level
LDATA1
Output
Input
RDATA1
Input
Output
L/R2
Shift direction for channel 2 shift register
L/R2
High-level
Low-level
LDATA2
Output
Input
RDATA2
Input
Output
LDATA1
RDATA1
LDATA2
RDATA2
M
CLKLA
CLKSR
CH2-BP
Serial data input/output pins for channel 1 shift register
Serial data input/output pins for channel 2 shift register
Switching clock signal for LCD driver.
Latches channael 1 data on the falling edge.
This also will latch channel 2 data on the falling edge if CH2-BP is low.
Shift channel 1 data on the falling edge.
This also will shift channel 2 data on the falling edge if CH2-BP is low.
Switches the mode of channel 2.
Exchanges the latch signal for the shift signal of channel 2 and invert the M signal.
Channel 2, then, can be used as a scan-line driver.
CH2-BP
High
Low
Channel 2
Latch
Shift
CLKSR
CLKLA
CLKLA
CLKSR
M
M For scan-line driver
M For signal line driver
Functional Description
LC7930N, LC7930NW are serial data transfer type LCD drivers.
Data inputted serially from the data pin is shifted successively by the synchronizing clock (CLKSR) and latched by the latch clock
(CLKLA) when the all data are shifted.
. Segment terminal
When CH2-BP goes to low, the data of channel 1 and channel 2 are shifted at the falling edge of CLKSR, and then latched at
. the falling edge of the CLKLA. The reference pulse will be switched to selected or unselected due to the latched data.
Scan terminal
When CH2-BP goes to high, the data of channel 2 is shifted at the rising edge of CLKLA, and then latched at the rising edge of
the CLKSR. When FLM signal, as a data, is inputted, the output will be scan terminal drive mode.
Continued on next page.
No.2778-5/7

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