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LC7851 の電気的特性と機能

LC7851のメーカーはSanyo Semicon Deviceです、この部品の機能は「QPSK Demodulation and Audio Signal-Processing IC for Satellite Broadcast Reception」です。


製品の詳細 ( Datasheet PDF )

部品番号 LC7851
部品説明 QPSK Demodulation and Audio Signal-Processing IC for Satellite Broadcast Reception
メーカ Sanyo Semicon Device
ロゴ Sanyo Semicon Device ロゴ 




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LC7851 Datasheet, LC7851 PDF,ピン配置, 機能
Ordering number : EN5691
CMOS LSI
LC7851E
QPSK Demodulation and Audio Signal-Processing IC
for Satellite Broadcast Reception
Overview
The LC7851E demodulates the QPSK (quadrature phase
shift keying) modulated audio data broadcast by the
Japanese BS and CS broadcast satellites and converts that
data to an analog audio signal. This IC integrates on a
single chip the audio system signal processing required for
BS and CS receivers from QPSK demodulation to analog
audio reproduction. The main functions provided by the
LC7851E include QPSK demodulation, differential
decoding conversion, descrambling, deinterleaving, and
error correction. It also generates a PCM audio signal. The
PCM audio signal is converted to an analog audio signal
by on-chip digital filters and A/D converters.
Features
• QPSK demodulator, PCM decoder, digital filters, D/A
converters, and operational amplifiers integrated on a
single chip.
• The number of required external components has been
reduced and adjustment-free operation achieved in the
QPSK demodulator by implementing that block as a
digital circuit on a single chip.
• CPU interface using an I2C bus
• Interface circuits for CORTEC and SkyPort
descramblers
Functions
• QPSK demodulation
• Bit timing clock recovery
• Differential decoding conversion and parallel-to-serial
conversion
• Frame synchronization (forward protection: 8 cycles,
back protection: 3 cycles): Frame synchronized/not
synchronized detection flag output provided.
• Tenth-order M-series descrambling
• Deinterleaving
• BCH (63, 56) error correction and dual error detection:
Single error detected flag output provided.
• Support for both interpolation and previous data hold
when a dual error is detected.
Control bit majority judgment protection every 16
frames
• Register data previous value hold when dual errors are
detected using BCH(7,3)
• Ten to 14 bit expansion of audio data during A mode
broadcasts.
• Data protection using majority control for the upper bits
of the audio data during B mode broadcasts
• Full complement of muting functions
— Audio suppression provided (bit 16 of the post-
majority decision control bits)
— Non-audio signal suppression (bits 2 to 5 of the post-
majority decision control bits)
— Forced muting
— Muting when not synchronized
— Muting when large numbers of errors are detected
(modifiable conditions)
— Channel switching
— Charged (pay-per-view) program flag muting
— Mute detection output provided.
• General-purpose ports (2 input ports and 8 output ports)
• EIAJ digital audio interface output
• 8× oversampling digital filters
• Multi-bit D/A converter (with built-in output operational
amplifiers)
• 5 V single-voltage power supply
• QFP (QIP) 64E package
Package Dimensions
unit: mm
3195-QFP64E
[LC7851E]
SANYO: QIP64E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
83097HA(OT) No. 5691-1/9

1 Page





LC7851 pdf, ピン配列
Pin Assignment
DVSS
LC7851E
VSS
VDD
PVSS
PVDD
VVDD
VVSS
AVSS
Pin Functions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Pin
BSTRI
BSTRO
P7
P6
P5
P4
P3
P2
P1
P0
CK5M
DVDD
TSL
AVSS
QPSKI
AVDD
VRM
AVSS
VRB
VCADJ
VCIN
I/O Function
I Bit stream input
O Bit stream output
O General-purpose output port
O General-purpose output port
O General-purpose output port
O General-purpose output port
O General-purpose output port
O General-purpose output port
O General-purpose output port
O General-purpose output port
O Filter adjustment clock output (5.7272 MHz)
I Digital system power supply
I Output control for the state when reset by the PHCNT pin (Low: high-impedance, high: 50% duty pulse output)
I Internal A/D converter ground
I QPSK modulated signal input
I Internal A/D converter power supply
O Internal A/D converter reference (center) output
I Internal A/D converter ground
O Internal A/D converter reference (low) output
Connection for internal VCO adjustment external resistor
I Internal VCO control input
Continued on next page.
No. 5691-3/9


3Pages


LC7851 電子部品, 半導体
LC7851E
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Supply voltage
Input voltage
Parameter
Output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD
VI1
VI2
VO
Pd max
Topr
Tstg
Conditions
Pins other than SCL and SDA
SCL and SDA
Ta = –20 to +75°C
Allowable Operating Ranges at Ta = 25°C
Ratings
–0.3 to +7.0
–0.3 to VDD+0.3
–0.3 to +5.3
–0.3 to VDD +0.3
360
–20 to +75
–40 to +125
Parameter
Supply voltage
Input high-level voltage
Input low-level voltage
QPSKI input voltage
Symbol
VDD
VIH
VIL
VQPSKI
Conditions
min
4.5
0.75 VDD
0
0.7
Ratings
typ
5.0
0.9
max
5.5
VDD
0.25 VDD
1.1
DC Characteristics at Ta = –20 to +75°C, VDD = 4.5 to 5.5 V, GND = 0 V
Current drain
Parameter
Output high-level current
Symbol
Conditions
IDD
IOH1
VOH = VDD – 0.4 V ; VOH = VDD – 0.4 V,
CMOS output pins:PHCNT, LOIN, MOD,
DSTRO, FRM, ERR, CK2M, BSTRO, MUTO,
DADO, REQ, SYCKO
Ratings
min typ
68
1.0
max
98
Output low-level current 1
Output amplitude level
Input high-level current
Input low-level current
Output load resistance
IOH2
IOL1
IOL2
IOL3
IOL4
VCK5M
IIH
IIL
RL
VOH = VCK5MH – 25 mV, CK5M
VOL = 0.4 V ; CMOS output pins: PHCNT,
LOIN, MOD, DSTRO, FRM, ERR, CK2M,
BSTRO, MUTO, DADO, REQ, SYCKO
VOL = 0.4 V, open drain output
Pin 1: P0 to P7
VOL = 0.4 V, open drain output
Pin 2: SDA
VOL = VCK5ML + 25 mV, CK5M
IOH = 30 µA, CK5M
VI = VDD, Schmitt inputs: TSL, RST, TEST1,
TEST2, BSTRI, DSTRI1, DSTRI2, DASL,
MUTI, SCL, SDA, P0 to P7
VI = VSS, Schmitt inputs: TSL, RST, TEST1,
TEST2, BSTRI, DSTRI1, DSTRI2, DASL,
MUTI, SCL, SDA, P0 to P7
AOUTL and AOUTR
–350
1.0
1.0
4.0
100
236
–10
5.0
295
D/A Converter Characteristics at Ta = –20 to +75°C, VDD = 4.5 to 5.5 V, GND = 0 V
Parameter
Symbol
Conditions
Ratings
min typ
Resolution
RES 1 kHz 0 dB
16
Total harmonic distortion
THD1
THD2
1 kHz A mode, FS - 18 dB *
1 kHz B mode, FS - 18 dB *
0.08
0.05
Signal-to-noise ratio
S/N 1 kHz 0 dB *
105
Crosstalk
C. T 1 kHz 0 dB *
95
Full scale output voltage
VFS
2.8 3.0
Note: *Values when measured in the Sanyo evaluation board and with a QPSK modulated signal (1 kHz sine wave) input.
–100
350
354
10
max
3.2
Unit
V
V
V
V
mW
°C
°C
Unit
V
V
V
V
Unit
mA
mA
µA
mA
mA
mA
µA
mV
µA
µA
k
Unit
Bits
%
%
dB
dB
Vp-p
No. 5691-6/9

6 Page



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共有リンク

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部品番号部品説明メーカ
LC7851

QPSK Demodulation and Audio Signal-Processing IC for Satellite Broadcast Reception

Sanyo Semicon Device
Sanyo Semicon Device
LC7851E

QPSK Demodulation and Audio Signal-Processing IC for Satellite Broadcast Reception

Sanyo Semicon Device
Sanyo Semicon Device


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