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PDF LC7574NW Data sheet ( Hoja de datos )

Número de pieza LC7574NW
Descripción 1/2 Duty VFD Driver for Frequency Display
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC7574NW Hoja de datos, Descripción, Manual

Ordering number : EN3586A
CMOS LSI
LC7574NE, 7574NW
1/2 Duty VFD Driver for Frequency Display
Overview
The LC7574NE and LC7574NW are 1/2 duty VFD
drivers that can be used for electronic tuning frequency
display and other applications under the control of a
controller. These products can directly drive VFDs with
up to 74 segments.
Features
• 74 segment outputs
• Noise reduction circuits are built into the output drivers.
• Serial data input supports CCB* format
communications with the system controller.
• Switching between digital and analog dimmers under
serial data control
• High generality since display data is displayed without
the intervention of a decoder
• All segments can be turned off with the BLK pin
Package Dimensions
unit: mm
3156-QFP48E
[LC7574NE]
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
unit: mm
3163A-SQFP48
[LC7574NW]
SANYO: QFP48E
SANYO: SQFP48
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
O2095HA (OT)/4032JN No. 3586-1/10

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LC7574NW pdf
Serial Data Transfer Format
1. When CL is stopped at the low level
LC7574NE, 7574NW
2. When CL is stopped at the high level
Figure 2
CCB address: Transfer 1010B, as shown in Figure 2.
M0: Digital/analog dimmer selection data
M0 = 0 ....................................Digital dimmer
M0 = 1 ....................................Analog dimmer
DM0 to DM9: Dimmer data
This data controls the duty of the G1 and G2 digit output pins when the digital dimmer is selected.
This data consists of 10 bits, of which DM0 is the LSB. Note that display intensity can be adjusted by
controlling the duty of the G1 and G2 digit output pins. (The DM0 to DM9 dimmer data is ignored
when the analog dimmer is selected.)
SD1 to SD74: Display data
SD1 to SD37...........................Display data for the G1 digit output pin
SD38 to SD74.........................Display data for the G2 digit output pin
SDn (n = 1 to 74) = 1..............Display on
SDn (n = 1 to 74) = 0..............Display off
T0: Test data
The T0 bit must be set to 0.
No. 3586-5/10

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