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Número de pieza | 74LVC3G07 | |
Descripción | Triple buffer | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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No Preview Available ! 74LVC3G07
Triple buffer with open-drain output
Rev. 03 — 01 February 2005
www.DataSheet4U.com
Product data sheet
1. General description
The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device
and superior to most advanced CMOS compatible TTL families.
Input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall
time.
This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC3G07 provides three non-inverting buffers.
The output of the device is an open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
2. Features
s Wide supply voltage range from 1.65 V to 5.5 V
s 5 V tolerant input/output for interfacing with 5 V logic
s High noise immunity
s Complies with JEDEC standard:
x JESD8-7 (1.65 V to 1.95 V)
x JESD8-5 (2.3 V to 2.7 V)
x JESD8-B/JESD36 (2.7 V to 3.6 V).
s ESD protection:
x HBM EIA/JESD22-A114-B exceeds 2000 V
x MM EIA/JESD22-A115-A exceeds 200 V.
s −24 mA output drive (VCC = 3.0 V)
s CMOS low power consumption
s Latch-up performance exceeds 250 mA
s Direct interface with TTL levels
s Inputs accept voltages up to 5 V
s Multiple package options
s Specified from −40 °C to +85 °C and −40 °C to +125 °C.
1 page Philips Semiconductors
74LVC3G07www.DataSheet4U.com
Triple buffer with open-drain output
10. Recommended operating conditions
Table 7: Recommended operating conditions
Symbol Parameter
Conditions
VCC
VI
VO
Tamb
tr, tf
supply voltage
input voltage
output voltage
active mode
Power-down mode; VCC = 0 V
ambient temperature
input rise and fall
times
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
Min Typ
1.65 -
0-
0-
0-
−40 -
0-
0-
Max Unit
5.5 V
5.5 V
VCC V
5.5 V
+125 °C
20 ns/V
10 ns/V
11. Static characteristics
Table 8: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = −40 °C to +85 °C [1]
VIH HIGH-level input
voltage
VIL LOW-level input
voltage
VOL LOW-level output
voltage
ILI input leakage current
IOZ 3-state output
OFF-state current
Ioff power-off leakage
current
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VI = VIH or VIL
IO = 100 µA;
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
VI = 5.5 V or GND;
VCC = 1.65 V to 5.5 V
VI = VIH or VIL; VO = VCC or GND;
VCC = 5.5 V
VI or VO = 5.5 V; VCC = 0 V
0.65 × VCC -
1.7 -
2.0 -
0.7 × VCC -
--
--
--
--
--
--
--
--
--
--
- ±0.1
- ±0.1
- ±0.1
ICC
∆ICC
CI
quiescent supply
current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
additional quiescent VI = VCC − 0.6 V; IO = 0 A;
supply current per pin VCC = 2.3 V to 5.5 V
input capacitance
- 0.1
-5
- 2.5
Max Unit
-V
-V
-V
-V
0.35 × VCC V
0.7 V
0.8 V
0.3 × VCC V
0.1 V
0.45 V
0.3 V
0.4 V
0.55 V
0.55 V
±5 µA
±10 µA
±10 µA
10 µA
500 µA
- pF
9397 750 14542
Product data sheet
Rev. 03 — 01 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 14
5 Page Philips Semiconductors
74LVC3G07www.DataSheet4U.com
Triple buffer with open-drain output
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
b
1234
4×
L1 L (2)
e
8
e1
7
e1
6
e1
5
8× A
(2)
A1
D
SOT833-1
E
terminal 1
index area
01
DIMENSIONS (mm are the original dimensions)
scale
UNIT
A (1)
max
A1
max
b
D
E
e
mm
0.5
0.04
0.25
0.17
2.0
1.9
1.05
0.95
0.6
e1 L L1
0.5
0.35 0.40
0.27 0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT833-1
---
MO-252
---
Fig 10. Package outline SOT833-1 (XSON8)
9397 750 14542
Product data sheet
Rev. 03 — 01 February 2005
2 mm
EUROPEAN
PROJECTION
ISSUE DATE
04-07-22
04-11-09
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 14
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet 74LVC3G07.PDF ] |
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