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LC74785M の電気的特性と機能

LC74785MのメーカーはSanyo Semicon Deviceです、この部品の機能は「On-Screen Display Controller LSI」です。


製品の詳細 ( Datasheet PDF )

部品番号 LC74785M
部品説明 On-Screen Display Controller LSI
メーカ Sanyo Semicon Device
ロゴ Sanyo Semicon Device ロゴ 




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LC74785M Datasheet, LC74785M PDF,ピン配置, 機能
Ordering number : EN5520A
CMOS LSI
LC74785, LC74785M
On-Screen Display Controller LSI
Overview
The LC74785 and LC74785M are on-chip EDS CMOS
LSIs for on-screen display, a function that displays
characters and patterns on a TV screen under
microprocessor control. These LSIs support 12 × 18 dot
characters and can display 12 lines by 24 characters of
text.
Features
• Display format: 24 characters by 12 rows (Up to 288
characters)
• Character format: 12 (horizontal) × 18 (vertical) dots
• Character sizes: Three sizes each in the horizontal and
vertical directions
• Characters in font: 128
• Initial display positions: 64 horizontal positions and 64
vertical positions
• Blinking: Specifiable in character units
• Blinking types: Two periods supported: About 1.0
second and about 0.5 second
• Blanking: Over the whole font (12 × 18 dots)
• Background color
— Background coloring: 8 colors (internal synchronization
mode): 4fsc
— Background coloring: 6 colors (internal synchronization
mode): 2fsc
• Line background color
— Can be set for 3 lines
— Line background coloring: 8 colors (internal synchro-
nization mode): 4fsc
— Line background coloring: 6 colors (internal synchro-
nization mode): 2fsc
• External control input: 8-bit serial input format
• On-chip sync separator circuit
• EDS support
• Video output
— NTSC-format composite output
• Package
24-pin plastic DIP (300 mil)
24-pin plastic SOP (375 mil)
Package Dimensions
unit: mm
3067-DIP24S
[LC74785]
unit: mm
3045B-MFP24
[LC74785M]
SANYO: DIP24S
SANYO: MFP24
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
63097HA (OT) No. 5520-1/24

1 Page





LC74785M pdf, ピン配列
LC74785, LC74785M
Continued from preceding page.
Pin No.
15
16
17
18
Pin
CV IN
VDD1
SYNIN
CDLR
Function
Video signal input
Power supply
Sync separator circuit input
Background color phase adjustment
19 SEPOUT
Composite synchronizing signal output
20 SEP
IN
Vertical synchronizing signal input
21 CS2
Enable input
22 CPDT
Data output
23 RST
Reset input
24 VDD1
Power supply (+5 V)
Note: Both VDD1 pins must be connected to the power supply.
Notes
Composite video signal input
Power supply (+5 V: digital system power supply)
Video signal input for the built-in sync separator circuit
Background color phase adjustment. Connect to ground through a resistor and a capacitor.
Video signal output for the built-in sync separator circuit. Can be switched to function
as an output for signal (high or ST. pulse) due to MOD0 by setting SEL0 high.
Inputs the vertical synchronizing signal created by integrating the SEPOUT pin output
signal.
An integration circuit must be connected to the SEPOUT pin. This pin must be tied to
VDD1 if unused. This pin can be switched to function as the frame signal input mode
by setting SEL1 high. (This is valid when CTL3 is set to 1.)
EDS data output enable input. EDS data output is enabled when this pin is low. A
pull-up resistor is built in. (The input has hysteresis characteristics.)
EDS data output (This pin can be either an n-channel open-drain output or a CMOS
output.)
System reset input
A pull-up resistor is built in. (The input has hysteresis characteristics.)
Power supply (+5 V: digital system power supply)
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Supply voltage
Input voltage
Output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD
VIN
VOUT
Pd max
Topr
Tstg
Conditions
VDD1 and VDD2
All input pins
LN21, CPDT, SEPOUT, and SYNCJDG
Ta = 25°C
Ratings
VSS–0.3 to VSS+7.0
VSS–0.3 to VDD+0.3
VSS–0.3 to VDD+0.3
350
–30 to +70
–40 to +125
Unit
V
V
V
mW
°C
°C
Allowable Operating Ranges at Ta = –30 to +70°C
Parameter
Symbol
Conditions
Ratings
min typ
Supply voltage
Input high-level voltage
Input low-level voltage
Pull-up resistance
VDD1
VDD2
VIH1
VIH2
VIL1
VIL2
RPU
VDD1
VDD2
RST, CS1, CS2, SIN, SCLK, SEPIN,
and MUTE
CTRL1
RST, CS1, CS2, SIN, SCLK, SEPIN,
and MUTE
CTRL1
Applies to pins set for the RST, CS1, CS2,
SIN, SCLK, and MUTE pin options.
4.5
4.5
0.8VDD1
0.7VDD1
VSS – 0.3
VSS – 0.3
25
5.0
5.0
50
Composite video signal input voltage
Input voltage
VIN1
VIN2
VIN3
FOSC1
CVIN; VDD1 = 5 V
SYNIN; VDD1 = 5 V
XtalIN (When external clock input is used)
fin = 2 fsc or 4 fsc ; VDD1 = 5 V
The XtalIN and XtalOUT oscillator pins
(2 fsc: NTSC)
1.5
0.10
2.0
2.0
7.159
Oscillator frequency
FOSC1
The XtalIN and XtalOUT oscillator pins
(4 fsc: NTSC)
14.318
FOSC2
The OSCIN and OSCOUT oscillator pins
(LC oscillator)
5
Note: When the XtalIN pin is used in clock input mode, extreme care must be taken to prevent noise from entering the input signal.
max
5.5
1.27VDD1
VDD1 + 0.3
VDD1 + 0.3
0.2VDD1
0.3VDD1
90
2.5
5.0
10
Unit
V
V
V
V
V
V
k
Vp-p
Vp-p
Vp-p
MHz
MHz
MHz
No. 5520-3/24


3Pages


LC74785M 電子部品, 半導体
LC74785, LC74785M
Figure 3 O/E and LN21 Output Timing
No. 5520-6/24

6 Page



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部品番号部品説明メーカ
LC74785

On-Screen Display Controller LSI

Sanyo Semicon Device
Sanyo Semicon Device
LC74785M

On-Screen Display Controller LSI

Sanyo Semicon Device
Sanyo Semicon Device


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