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PDF LC74201E Data sheet ( Hoja de datos )

Número de pieza LC74201E
Descripción Video CD Decoder
Fabricantes Sanyo Semicon Device 
Logotipo Sanyo Semicon Device Logotipo



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No Preview Available ! LC74201E Hoja de datos, Descripción, Manual

Ordering number :EN *5684
CMOS LSI
LC74201E
Video CD Decoder
Preliminary
Overview
The LC74201E is a CMOS LSI that reduces the signal
processing functions required of a video CD decoder to a
single chip. All that it takes to make a version 1 or version
2 video CD player is the addition of a CD digital signal
processor, DRAM, an audio D/A converter, digital video
encoder, and similar components.
Features
• Incorporation of virtually almost all the functionality
required by a video CD player from the CD-ROM
decoder through to the MPEG audio and video decoders
in a single chip
• Fully automatic playback with automatic decoding
within the LSI in response to simple external commands
and the MPEG bit stream
• Special playback functions are activated by command
inputs, and do not require signal processing by the host
microcomputer
• Support for two external DRAM configurations:
4 M bits (256k × 16 bits) or 4 M bits (256k × 16 bits) +
1 M bit (64k × 16 bits)
• Support for a Track 1 DRAM user area (i.e., sector
buffer) of up to 8 k bytes (4 M bits of external DRAM)
or 22 k bytes (5 M bits of external DRAM)
• Automatic synchronization of audio and video
• Built-in high-speed decoder core that supports variable-
speed video playback at up to quadruple speed. Audio
support for normal and double-speed playback.
• Internal registers that offer configuration settings for
connecting to most commercially available CD digital
signal processors and D/A converters
• Compatible with version 2 of the video CD standard.
Support for superimposition of closed caption data on
the output signal as specified in the EIA608 standard
• Support for Photo CD standard. (Base/4 and Base/16)
Package Dimensions
unit: mm
3182-QFP-128E
[LC74201E]
SANYO: QIP-128E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
22897HA (OT) No. 5684-1/21

1 page




LC74201E pdf
LC74201E
4. CD interfaces
Pin No.
70
71
72
73
74
Symbol
CDEMPH
CDC2P
CDSD
CDBCK
CDLRCK
I/O Logic
In Positive Emphasis input (hysteresis input)
Function
In Positive C2 error flag input (hysteresis input)
In Positive Serial data input (hysteresis input)
In Positive Serial data bit clock input (hysteresis input)
In Positive Left/right clock input (hysteresis input)
5. Audio D/A converter interface
Pin No.
77
78
79
80
Symbol
AULRCK
AUEMPH
AUDOUT
AUBCO
I/O Logic
Out Positive Audio data left/right clock output
Out Positive Audio emphasis flag output
Out Positive Audio data serial output
Out Positive Audio data bit clock output
Function
Note:The four pins making up the audio D/A converter interface all use N-channel open-drain outputs.
6. Video interface
Pin No.
Symbol
I/O Logic
Function
1
BV0 (LSB)
I/O Positive Video signal outputs (B/V signals). (Inputs only in test mode.)
2 BV1 I/O Positive
3 BV2 I/O Positive
4 BV3 I/O Positive Tristate output using DVDD1 (3-V) power supply.
5 BV4 I/O Positive Video signal outputs (B/V signals). (Inputs only in test mode.)
6 BV5 I/O Positive
7 BV6 I/O Positive
8 BV7 (MSB) I/O Positive Tristate output using DVDD2 (5-V) power supply.
9 GU0 (LSB) I/O Positive Video signal outputs (G/U signals). (Inputs only in test mode.)
10
GU1
I/O Positive
11
GU2
I/O Positive
12
GU3
I/O Positive Tristate output using DVDD1 (3-V) power supply.
13
GU4
I/O Positive Video signal outputs (G/U signals). (Inputs only in test mode.)
14
GU5
I/O Positive
15
GU6
I/O Positive
16 GU7 (MSB) I/O Positive Tristate output using DVDD2 (5-V) power supply.
21
RY0 (LSB)
I/O Positive Video signal outputs (R/Y signals). (Inputs only in test mode.)
22
RY1
I/O Positive
23
RY2
I/O Positive
24
RY3
I/O Positive Tristate output using DVDD1 (3-V) power supply.
Continued on next page.
No. 5684-5/21

5 Page





LC74201E arduino
LC74201E
Absolute Maximum Ratings
Parameter
Power supply voltage
Input voltage
Output voltage
Maximum current drain
Operating temperature
Storage temperature
Symbol
VDD1
VDD2
VDD3
VIN1
VIN2
VIN3
VOUT
VOUT
VOUT
Pd max
Topr
Tstg
Conditions
DVDD1 pin
DVDD2 pin
AVDD pin
BV0 to EV3, GU0 to GU3, RY0 to RY3,
RESET, XPALIN, XNTIN, CLKIN, VCOR,
PLLFIL, TEST pins
VOE, AS/DS, STB, AD0 to AD7, CLKSEL
CDCK, CDEMPH, CDC2P, CDSD, CDBCK,
CDLRCK pins
BV4 to BV7, GU4 to GU7, RY4 to TY7,
DD0 to DD15 pins
BV0 to EV3, GU0 to GU3, RY0 to RY3,
PCK0, XPALOUT, XNTOUT, CLK0, AULRCK,
AUEMPH, AUDOUT, AUBC0 pins
IRQ, AD0 to AD 7, CAS pins
BV4 to BV7, GU4 to GU7, RY4 to TY7,
FSC0, HSYNC, CSYNC, BLANK, RAS0, RAS1,
WE, OE, AA0 to AA8 pins
Ta = 25°C
Ratings
min max
DVSS1 – 0.3
DVSS2 – 0.3
AVSS – 0.3
DVSS1 + 4.0
DVSS2 + 6.0
AVSS + 4.0
DVSS1 – 0.3
DVDD1 + 0.3
DVSS1 – 0.3
5.5
DVSS2 – 0.3
DVSS2 + 0.3
DVSS1 – 0.3
DVSS1 – 0.3
DVSS2 – 0.3
–25
–40
DVDD1 + 0.3
DVSS2 + 0.3
500
+75
+125
Unit
V
V
V
V
V
V
V
V
V
mW
°C
°C
Recommended Operating Conditions at Ta = –25°C to +75°C
Parameter
Supply voltage
High-level input voltage
Low-level input voltage
Clock frequency
Input amplitude
Input frequency
Clock duty
Symbol
VDD1
VDD2
VDD3
VIH1
VIH2
VIH3
VIH4
VIH5
VIL1
VIL2
FOSC1
FOSC2
VIN1
FIN1
FIN2
fduty
Conditions
DVDD1 pin
DVDD2 pin
AVDD pin
BV0 to BV3, GU0 to GU3,RY0 to RY3 pins
RESET pin
VOE, AD0 to AD7, CDCK, CLKSEL, TEST pins
AS/DS, STB, CDEMPH, CDC2P, CDSD, CDBCK,
CDLRCK pins
min
3.7
4.5
3.7
0.7VDD1
0.8VDD1
0.7VDD1
0.8VDD1
BV4 to BV7, GU4 to GU7, RY4 to RY7,
DD0 to DD15 pins
0.7VDD1
BV0 to BV7, GU0 to GU7, RY0 to RY7, VOE, CDCK,
AD0 to AD7, CLKSEL, TEST, DD0 to DD15 pins
VSS1 – 0.3
RESET, AS/DS, STB, CDEMPH, CDC2P,CDSD,
CDBCK, CDLRCK pins
VSS1 – 0.3
XPALIN, XPALOUT pins (PAL)
XNTIN, XNTOUT pins (NTSC)
CLKIN pin (CLKSEL = high; FIN2 = 54 MHz)
Command – 11hex; D1, D0 = 0,0
CDCK pin Command – 11hex; D1, D0 = 0,1
Command – 11hex; D1, D0 = 1,0
CLKIN pin (CLKSEL = high)
CLKIN, CDCK pins
1.0
40
Ratings
typ
5.0
max
4.0
5.5
4.0
VDD1 + 0.3
VDD1 + 0.3
5.5
5.5
– VDD2 + 0.3
– 0.3VDD1
17.734475
14.31818
16.9344
2.1168
2.8224
54.000
0.2VDD1
VDD1 + 0.3
60
Unit
V
V
V
V
V
V
V
V
V
V
MHz
MHz
Vp-p
MHz
MHz
MHz
MHz
%
No. 5684-11/21

11 Page







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