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PDF LC72P366 Data sheet ( Hoja de datos )
| Número de pieza | LC72P366 | |
| Descripción | On-Chip One-Time Programmable PROM Single-Chip PLL Controller | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number :EN5544
CMOS LSI
LC72P366
On-Chip One-Time Programmable PROM
Single-Chip PLL Controller
Overview
The LC72P366 is a single-chip PLL-plus-controller one-
time programmable PROM microcontroller that
corresponds to the Sanyo LC72358N, LC72362N, and
LC72366. The LC72P366 has the same package and pin
assignment as the LC72358N, LC72362N, and LC72366
mask ROM versions, and provides 32 KB of on-chip
PROM, organized as 16k words by 16 bits. The
LC72P366 can prove useful in reducing the startup times
for initial production runs and for reducing the switchover
time when end-product specifications change.
Features
• 32 KB (16k words × 16 bits) of on-chip PROM
— This is a one-time programmable 32 KB (16k-word
× 16-bit) PROM.
• Pin compatible with the mask ROM versions, i.e.
identical package and pin assignment.
Package Dimensions
unit: mm
3174-QFP80E
[LC72P366]
Writing Sanyo ROMs
Sanyo provides a for-fee ROM writing service that
consists of writing data to the PROM in one-time
programmable PROM microcontrollers, printing,
screening, and data readout verification. Contact your
Sanyo sales representative for details.
SANYO: QIP80E
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
N3096HA (OT) No. 5544-1/14
1 page  
LC72P366
Electrical Characteristics in the Allowable Operating Ranges
Parameter
Symbol
Conditions
min
Input high-level current
IIH(1)
IIH(2)
IIH(3)
XIN : VI = VDD = 5.0 V
FMIN, AMIN, HCTR, LCTR : VI = VDD = 5.0 V
Ports A, E, F, G, H, I, K, L, M, and Q,
SNS, HOLD, HCTR, LCTR, and with no
pull-down resistor on port A, VI = VDD = 5.0 V
With input mode selected for ports
E, F, G, K, L, M, and Q
2.0
4.0
Input low-level current
IIH(4)
IIL(1)
IIL(2)
IIL(3)
Port A: pull-down resistor present
XIN:VI = VSS
FMIN, AMIN, HCTR, LCTR : VSS
Ports A, E, F, G, H, I, K, L, M, and Q,
SNS, HOLD, HCTR, LCTR, and with no
pull-down resistor on port A, VI = VSS
With input mode selected for ports E, F,
G, K, L, M, and Q
2.0
4.0
Input floating voltage
Pull-down resistance
Hysteresis
Output high-level voltage
Output low-level voltage
Output off leakage current
A/D conversion error
Rejected pulse width
Power down detection voltage
Current drain
VIF
RPD(1)
RPD(2)
VH
VOH(1)
VOH(2)
VOH(3)
VOH(4)
VOL(1)
VOL(2)
VOL(3)
VOL(4)
VOL(5)
IOFF(1)
IOFF(2)
IOFF(3)
PREJ
VDET
IDD(1)
IDD(2)
IDD(3)
Port A: pull-down resistor present
Port A: pull-down resistor present VDD = 5 V
TEST1, TEST2
75
Ports F, G, and K, LCTR (in period measurement mode)
Ports B and C: IO = –1 mA
Ports D, E, F, G, K, L, M, N, O, P, and Q: IO = –1 mA
EO1, EO2, EO3, SUBPD : IO = –500 µA
XOUT : IO = –200 µA
Ports B and C: IO = 50 µA
Ports D, E, F, G, K, L, M, N, O, P, and Q: IO = 1 mA
EO1, EO2, EO3, SUBPD : IO = 500 µA
XOUT : IO = 200 µA
Port J: IO = 5 mA
Ports B, C, D, E, F, G, K, L, M, N, O, P, and Q
0.1 VDD
VDD – 2.0
VDD – 1.0
VDD – 1.0
VDD – 1.0
–3.0
EO1, EO2, EO3, SUBPD
–100
Port J
–5.0
ADI0 to ADI5 : VDD(1)
SNS
–1/2
3.0
VDD(1) : fIN(2) = 130 MHz, Ta = 25˚C
VDD(2): halt mode*, Ta = 25˚C (See figure 1.)
VDD = 5.5 V, oscillator stopped
Ta = 25˚C (See figure 2.)
IDD(4)
VDD = 2.5 V, oscillator stopped
Ta = 25°C (See figure 2.)
Note: * Executing 20 STEP instructions every millisecond. With the PLL and counter circuits stopped.
Ratings
typ
5.0
10
max
15
30
3.0
50
5.0 15
10 30
3.0
100
10
0.2 VDD
VDD – 1.0
0.05 VDD
200
1.0
3.5
12
0.45
2.0
1.0
1.0
1.5
2.0
+3.0
+100
+5.0
+1/2
50
4.0
24
5
1
Unit
µA
µA
µA
µA
µA
µA
µA
V
kΩ
kΩ
V
V
V
V
V
V
V
V
µA
nA
µA
LSB
µs
V
mA
mA
µA
µA
Test Circuit Diagrams
Note: With PB to PG, and PJ to PQ all open.
However, with PE to PG, PK to PM, and PQ selected for output.
Figure 1 IDD(2) in Halt Mode
Note: With PA to PQ all open.
Figure 2 IDD(3) and IDD(4) in Backup Mode
No. 5544-5/14
5 Page 
LC72P366
• Conditions required for mounting the LC72P366
1. Products programmed by the user:
Mount the LC72P366 using the following procedure
when using products shipped from Sanyo without the
PROM having been programmed.
2. Products programmed by Sanyo:
Mount the LC72P366 using the following procedure
when using products shipped from Sanyo with the
PROM programmed by Sanyo.
[Caution]
• Due to the nature of the product, it is not possible for Sanyo to fully test
one-time programmable PROM microcontrollers (i.e., products with
blank PROMs) before shipment to the customer. This means that there
will be some amount of yield reduction after programming.
Usage Procedures
• Programming the on-chip PROM
There are two methods for writing the LC72P366 on-chip PROM as follows:
— Using a general-purpose PROM programmer
A general-purpose PROM programmer can be used if a special-purpose PROM programming adapter (product
name: LC72P366 EPROM PROGRAMMER) is used. The write procedure used is the 27512 or 27C512 (with Vpp
= 12.5 V) Intel fast write method. Specify 0000H to 7FFFH as the address settings.
— Using the RE32N in-circuit emulator:
The RE32N in-circuit emulator can be used if a special-purpose PROM programming adapter (product name:
LC72P366 RE32N) is used. Use the PGOTP command as the write method.
• Special-purpose writing adapters
Since there are two special-purpose PROM programming adapters as mentioned above, the correct adapter must be
used.
General-purpose EPROM programmer adapter
In-circuit emulator RE32 adapter
: Product name LC72P366 EPROM PROGRAMMER
: Catalog no. NDK-DC-018
: Product name LC72P366 RE32N
: Catalog no. NDK-DC-020
No. 5544-11/14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LC72P366.PDF ] | |
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