PDF LC7265 Data sheet ( Hoja de datos )

Número de pieza	LC7265
Descripción	Received Frequency Display for Radio Receivers
Fabricantes	Sanyo Semicon Device
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No Preview Available ! Ordering number: EN 1197F CMOS IC LC7265 Received Frequency Display for Radio Receivers Features . Displays received frequency of each band of FM, MW, LW . (LED static display). Counts local oscillation frequency and displays received . frequency. Number of display digits : FM-5 digits, MW-4 digits, LW-3 . digits. Covers intermediate frequencies shown below. FM : +10.700, +10.725, +10.750, +10.675 MHz –10.700, –10.725, –10.675, –10.650 MHz MW, LW : +450 kHz : 10 kHz step display +450 kHz : 1 kHz step display +455 kHz : 1 kHz step display +469 kHz : 1 kHz step display . Contains blanking circuit to turn off display. . Contains hold circuit to hold display contents. . Uses crystal resonator having 7.2 MHz reference frequency. . Uses LB3500 (÷8 prescaler) jointly at the time of FM . reception. Supply voltage VDD : 4.5 V to 10 V Package Dimensions unit : mm 3025B-DIP42S [LC7265] SANYO : DIP42S Specifications Absolute Maximum Ratings at Ta = 25 °C, VSS = 0 V Parameter Maximum supply voltage Input voltage Output voltage Allowable power dissipation Allowable power dissipation of segment outputs Operating temperature Storage temperature Symbol VDD max VIN VO1 VO2 Pd max Pd (seg)1 Pd (seg) 2 Pd (seg) 3 Pd (seg) 4 Topr Tstg Conditions All input pins XOUT, HLD, 50 Hz, output: off Output pins other than VO1 Ta % 65 °C MHz, b&c, b&e, VDD = 4.5 to 6.5 V, IOL = 33 mA Other outputs, VDD = 4.5 to 6.5 V, IOL = 16.5 mA MHz, b&c, b&e, VDD = 6.0 to 10 V, IOL = 36 mA Other outputs, VDD = 6.0 to 10 V, IOL = 18 mA Ratings –0.3 to +11 –0.3 to VDD+0.3 –0.3 to VDD+0.3 0 to 15 550 30 15 25 12 –30 to +65 –40 to +125 Unit V V V V mW mW mW mW mW °C °C SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 63098HA(II)/6088YT/9105KI/3173KI/D162KI/7162KI/6242KI,TS No.1197-1/6 1 page LC7265 Hold time – time constant connected to HLD pin To obtain 1-s hold time make time constant connected to HLD pin 720 ms. C = 2.2 µF R = 470 kΩ Note: time constant connected to HLD pin must be 100 ms or more. Time constant connected to BLK pin − VDD rise time Time constant connected to HLD pin, (t = CR) – ms IDD – VDD For FMI input : 18 MHz, 0.7Vp-p, A/F = VDD For AMI input : 3 MHz, 0.5Vp-p, A/F = VSS For FMI input Common conditions Other pins open For AMI input Supply voltage, VDD – V Vp-p – fIN1 If VDD rise time is 200 ms, make time constant externally connected to BLK pin 200 ms or more. C = 1 µF or more R = 200 kΩ VDD rise time – ms IDD – Ta For FMI input : 18 MHz, 0.7Vp-p, A/F = VDD For AMI input : 3 MHz, 0.5Vp-p,A/F = VSS For FMI input Common conditions For AMI input Other pins open Ambient temperature, Ta – °C Vp-p – fIN2 FMI input frequency, fIN1 – Hz VDD – fIN1 Upper standard value. VDD = 15 V or more Lower standard value FMI input frequency, fIN1 – MHz AMI input frequency, fIN2 – Hz VDD – fIN2 Upper standard value Lower standard value AMI input frequency, fIN2 – MHz No.1197-5/6 5 Page

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