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PDF VNQ5050AK-E Data sheet ( Hoja de datos )
| Número de pieza | VNQ5050AK-E | |
| Descripción | Quad channel high side driver | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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VNQ5050AK-E
Quad channel high side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC 41V
Operating voltage range
VCC 4.5 to 36V
Max on-state resistance (per ch.) RON 50 mΩ
Current limitation (typ)
Off state supply current
ILIMH
IS
19 A
2 µA(1)
1. Typical value with all loads connected.
■ General features:
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
■ Diagnostic functions:
– Proportional load current sense
– High current sense precision for wide
current range
– Current sense disable
www.DataShee–t4UT.choemrmal shutdown indication
– Very low current sense leakage
■ Protection:
– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of VCC
– Thermal shut down
– Reverse battery protection (see Figure 25)
– Electrostatic discharge protection
PowerSSO-24
Application
■ All types of resistive, inductive and capacitive
loads.
■ Suitable as LED driver.
Description
The VNQ5050AK-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active VCC pin voltage clamp protects the
device against low energy spikes (see ISO7637
transient compatibility table).
This device integrates an analog current sense
which delivers a current proportional to the load
current (according to a known ratio) when
CS_DIS is driven low or left open. When CS_DIS
is driven high, the CURRENT SENSE pin is in a
high impedance condition.
Output current limitation protects the device in
overload condition. In case of long overload
duration, the device limits the dissipated power to
a safe level up to thermal shut-down intervention.
Thermal shut-down with automatic restart allows
the device to recover normal operation as soon as
the fault condition disappears.
Table 1. Device summary
Package
Tube
Order codes
Tape and Reel
PowerSSO-24
VNQ5050AK-E
VNQ5050AKTR-E
December 2007
Rev 6
1/31
www.st.com
31
1 page  
VNQ5050AK-E
Block diagram and pin configuration
1 Block diagram and pin configuration
Figure 1. Block diagram
VCC
GND
INPUT1
INPUT2
INPUT3
INPUT4
CS_DIS
VCC
CLAMP
LOGIC
UNDERVOLTAGE
PwCLAMP 1
DRIVER 1
ILIM 1
VDSLIM 1
IOUT1
OVERTEMP. 1
K1
PwrLIM 1
OUTPUT1
INPUT2
Control & Protection
CURRENT
SENSE2
Equivalent to
channel1
INPUT3 Control & Protection
CURRENT
SENSE3
Equivalent to
channel1
INPUT4 Control & Protection
CURRENT
SENSE4
Equivalent to
channel1
CURRENT
SENSE1
VCC
OUTPUT2
CURRENT
VCC SENSE2
OUTPUT3
VCC
CURRENT
SENSE3
OUTPUT4
CURRENT
SENSE4
Table 2. Pin functions
Name
Function
www.DataSheet4U.com
VCC
OUTPUTn
GND
INPUTn
CURRENT
SENSEn
CS_DIS
Battery connection
Power output
Ground connection. Must be reverse battery protected by an external
diode/resistor network
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
Analog current sense pin, delivers a current proportional to the load current
Active high CMOS compatible pin, to disable the current sense pin
5/31
5 Page 
VNQ5050AK-E
Electrical specifications
Table 8. Current sense (8V<VCC<16V) (continued)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
ISENSEH
Analog sense output
current in
overtemperature
condition
VCC= 13V; VSENSE= 5V
Delay response time
tDSENSE1H from falling edge of
CS_DIS pin
VSENSE<4V, 0.5A<Iout<4A
ISENSE= 90% of ISENSE max
(see Figure 4.)
Delay response time
tDSENSE1L from rising edge of
CS_DIS pin
VSENSE<4V, 0.5A<Iout<4A
ISENSE=10% of ISENSE max
(see Figure 4.)
Delay response time
tDSENSE2H from rising edge of
INPUT pin
VSENSE<4V, 0.5A<Iout<4A
ISENSE=90% of ISENSE max
(see Figure 4.)
∆tDSENSE2H
Delay response time
between rising edge of
output current and
rising edge of current
sense
Delay response time
tDSENSE2L from falling edge of
INPUT pin
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX=2A (see Figure 5)
VSENSE<4V, 0.5A<Iout<4A
ISENSE=10% of ISENSE max
(see Figure 4.)
8 mA
50 100 µs
5 20 µs
80 250 µs
65 µs
100 250 µs
1. Parameter guaranteed by design; it is not tested.
Table 9.
Symbol
Protection(1)
Parameter
Test conditions
Min. Typ. Max. Unit
www.DataSheet4U.com
IlimH
DC short circuit
current
VCC=13V
5V<VCC<36V
IlimL
Short circuit current
during thermal cycling
VCC=13V; TR<Tj<TTSD
13.5 19 26.5 A
26.5 A
7A
TTSD
Shutdown
temperature
150 175 200 °C
TR Reset temperature
TRS
Thermal reset of
STATUS
TRS + 1 TRS + 5
135
°C
°C
THYST
Thermal hysteresis
(TTSD-TR)
VDEMAG
Turn-Off output
voltage clamp
IOUT=2A; VIN=0; L=6mH
7 °C
VCC-41 VCC-46 VCC-52 V
Output voltage drop
VON limitation
IOUT=0.1A; Tj=-40°C...150°C
(see Figure 9.)
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
11/31
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