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ST21NFCA の電気的特性と機能

ST21NFCAのメーカーはSTMicroelectronicsです、この部品の機能は「Near field communication microcontroller」です。


製品の詳細 ( Datasheet PDF )

部品番号 ST21NFCA
部品説明 Near field communication microcontroller
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 




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ST21NFCA Datasheet, ST21NFCA PDF,ピン配置, 機能
ST21NFCA
Near field communication microcontroller
Data Brief
Features
ST21NFCA operating modes supported:
Card emulation
Reader
Peer-to-peer communication
Hardware features
Enhanced 8/16-bit CPU core with 16 Mbytes
linear addressable memory
112 Kbytes of User ROM
4 Kbytes of RAM
36 Kbytes of EEPROM including 64 bytes User
OTP area
High integrated analog front end (AFE) for RF
transmission and reception including automatic
card and field detection modes
Three 8-bit timers with interrupt capability
Battery Off and Battery Low modes supported
in Card Emulation mode
Optimized power consumption modes
SIM and ST21NFCA power management
functions
RF communications
ISO/IEC 14443 A&B
ISO/IEC 15693
ISO/IEC 18000-3 Mod1
ECMA340 (NFCIP-1)
Supports FeliCa™ cards as described in
ECMA340 specification
All RF communications are available in card
and reader modes
Communication interfaces
Single Wire Protocol (SWP) interface
I2C Slave interface
SPI Slave interface
Asynchronous receiver transmitter ISO/IEC
7816-3 master interface supporting T=0 and
T=1 protocols
VFQFPN32
Security features
True random number generator
ISO/IEC 3309 CRC calculation block
Unique serial number on each die
Hardware DES accelerator
Electrical characteristics
Standby current: < 75 µA (typ.)
Card emulation: < 8 mA in normal mode
Standby current for Reader mode: ~200 µA in
Card Detection mode
Reader mode: < 70 mA (typ.)
3V power supply
Supports Class B and C for UICC
Software features
Includes all drivers supporting the handling and
host protocols for contact and contactless
interfaces
Includes complete firmware driving switch
modes between operating modes and host
controller interface functions (HCI)
Validation tools
An evaluation and debugging board is available
for complete integration.
www.DataSFheebertu4aUr.yco2m008
Rev 1
For further information contact your local STMicroelectronics sales office.
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ST21NFCA pdf, ピン配列
ST21NFCA
Description
In addition, the embedded firmware and associated macrocells support handling and
protocol for the various interfaces:
Single Wire Protocol (SWP) interface fully compliant with ETSI TS 102 613 Release 7
I2C Slave interface fully compliant with NXP specification
SPI Slave interface fully compliant with Freescale specification
Asynchronous Receiver Transmitter in master configuration supporting ISO/IEC 7816-3
T=0 and T=1 protocols
The ST21NFCA is a serial access circuit based on a 8/16-bit CPU core. Operations will be
synchronized with an internally generated clock issued by the Clock Generator module. The
internal speed of the device is fully software programmable.
The CPU includes the Arithmetic Logic Unit (ALU), the control logic and registers controlled
by the ST21NFCA firmware. The CPU interfaces with the on-chip RAM, ROM and EEPROM
memories via a 24-bit internal bus offering 16 MBytes of linear addressing space.
This device also includes a True Random Number Generator (TRNG), three 8-bit fully
programmable timers, a Cyclic Redundancy Check (CRC3309) module, and a Data
Encryption Standard (DES) accelerator.
Thanks to an enhanced power switch system, the ST21NFCA is able to support several
power supply sources ("Battery On", Battery Low and Battery Off" modes) which manages
the power management of the device and its associated UICC.
Figure 2. ST21NFCA block diagram
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ST21NFCA 電子部品, 半導体
ST21NFCA
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
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部品番号部品説明メーカ
ST21NFCA

Near field communication microcontroller

STMicroelectronics
STMicroelectronics


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