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STA2064 の電気的特性と機能

STA2064のメーカーはSTMicroelectronicsです、この部品の機能は「infotainment application processor」です。


製品の詳細 ( Datasheet PDF )

部品番号 STA2064
部品説明 infotainment application processor
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 




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STA2064 Datasheet, STA2064 PDF,ピン配置, 機能
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STA2064
Cartesio™ family
infotainment application processor with embedded GPS
Data brief
Features
ARM1176 533 MHz host processor
– Cache: 32 KB instruction, 32 KB data
– Vector floating point unit
High performance embedded GPS subsystem
– Parallel acquisition engines for 8 GPS
satellites or 4 Galileo satellites
– 32 tracking channels for all satellites in view
– 5 correlators per channel for urban canyon
robustness
– Multibit signal processing hardware
Advanced power management
– Separated power islands for ultra low
power mode
– Dynamic core frequency scaling
– 512-Byte embedded SRAM for back-up
System infrastructure
– LP DDR/DDR2 controller: 16 bit data
512 MB addressable. (333 MHz DDR2,
200 MHz LPDDR)
– One bank of 32 KB embedded SRAM
– 64-channel vector interrupt controller (VIC)
– 2 DMA controllers, 16 physical channels
– 32 DMA request for each controller
– Two external DMA requests are supported
Display and graphics
– Color LCD controller for STN,TFT or HR-
TFT panels with 18-bit parallel RGB
interface
– Integrated touch screen controller and ADC
– 3D advanced graphics acceleration
– JPEG baseline profile decoder
High throuput interfaces
– 1 port USB 2.0 OTG with integrated
physical layer
– 2 SD/MMC, both bootable
Audio interfaces and features
– Three multichannel serial ports (I2S/TDM)
– SPDIF input interface
TFBGA289 (15x15x1.2mm)
– C3 hardware reed-solomon decoder
– Sample rate converter
Standard interfaces
– Three 16-bit input capture/output compare
– Pulse width light modulator (PWL)
– Three autobaud UART
– Three I2C multimaster/slave interfaces
– Two synchronous serial port (SSP, SPI)
– Five 32-bit GPIO ports
One controller area network (CAN) in
automotive version
Programmable voltage IOs: 1.8 V, 2.5 V, 3.3 V
VIOON: 1.8 ±10%V, VDDON: VDD, 1.0 ±10%V
TFBGA 289, 0.8 mm pitch package, packing in
tray
Ambient temperature range: -40 / +85 °C
Table 1. Device summary
Order code
Qualification
grade
CPU freq.
STA2064N Consumer 533 MHz
STA2064A Automotive 533 MHz
CAN
No
1x
July 2009
Doc ID 16057 Rev 1
For further information contact your local STMicroelectronics sales office.
1/19
www.st.com
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STA2064 pdf, ピン配列
www.DataSShTeeAt42U0.6co4m
Contents
2.6.8 CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.7 Specific functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.7.1 GPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.7.2 Touchscreen controller/ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7.3 Multisupply IO ring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7.4 Driving strength and slew rate programmability . . . . . . . . . . . . . . . . . . . 11
3 System features introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1 Power region partition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2 Frequency region partition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3 Frequency and power range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4 Power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.5 System wakeup and power down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.6 IO groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Doc ID 16057 Rev 1
3/19


3Pages


STA2064 電子部品, 半導体
www.DataSShyesett4eUm.codmescription
STA2064
2.3.6
2.3.7
2.3.8
2.3.9
2.3.10
Real-time clock (RTC)
The RTC provides a one second resolution clock. This keeps time when the system is
inactive and can be used to wake the system up when a programmed ‘alarm’ time is
reached. It has a clock trimming feature to compensate the drift of the 32.768 kHz crystal.
Real-time timer (RTT)
The RTT has the possibility of being clocked off. This reduces the always_on domain
consumption during Deep Sleep. By default the RTT has its clock enabled.
Always_ON supply
The “Always_ON” domain retains its two separate supplies, one for the core logic (VDDON)
and one for the IOs (VIOON).
The VDDON supply is equal to VDD during normal operation but, with the goal of reaching the
lowest consumption possible, can also be configured as low as 1.0 ±10%V when the device
is in deep-sleep.
Enhanced function timer (EFT)
STA2064 features 4 16-bit EFTs. Each of the four EFT timers has a 16-bit free-running
counter with 7-bit prescaler, up to two input capture/output compare functions, a pulse
counter function, and a PWM channel with selectable frequency.
Watchdog timer (WDT)
This OS resource is used to trigger a system reset in the event of software failure.
2.4
2.4.1
Memory interfaces
SD/MMC
STA2064 features two SD/SDIO/MMC interfaces up to 52 MHz / one up to 8-bit data, the
other up to 4-bit data. The main clock available to the peripherals is:
PLL2CLK/13 (when PLL2CLK is 624 MHz and SRC_MMC52 = 0, 48 MHz will be
generated)
PLL2CLK/12 (when PLL2CLK is 624 MHz and SRC_MMC = 1, 52 MHz will be
generated)
PLL2CLK/9 (when PLL2CLK is 432 MHz, 48 MHz will be generated)
The peripheral is compliant to the following standards:
MMC 4.4
SD 2.0/Part 1 - Physical Layer
SD 2.0/Part E1 - SDIO Specification
6/19 Doc ID 16057 Rev 1

6 Page



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共有リンク

Link :


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